85 lines
2.6 KiB
C
85 lines
2.6 KiB
C
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#ifndef _SPI_NOR_H
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#define _SPI_NOR_H
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#include "global_types.h"
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#include "qspi_flash.h"
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#define STATUS1_BUSY (0x1)
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#define STATUS1_WEL (0x1 << 1)
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#define STATUS1_BP0 (0x1 << 2)
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#define STATUS1_BP1 (0x1 << 3)
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#define STATUS1_BP2 (0x1 << 4)
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#define STATUS1_TB (0x1 << 5)
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#define STATUS1_SEC (0x1 << 6)
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#define STATUS1_SRP0 (0x1 << 7)
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#define STATUS2_SRP1 (0x1)
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#define STATUS2_QE (0x1 << 1)
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#define STATUS2_LB1 (0x1 << 3)
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#define STATUS2_LB2 (0x1 << 4)
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#define STATUS2_LB3 (0x1 << 5)
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#define STATUS2_CMP (0x1 << 6)
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#define STATUS2_SUS (0x1 << 7)
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/*SPI NAND chip options*/
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#define SPINOR_NEED_PLANE_SELECT (1 << 0)
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#define SPINOR_NEED_DIE_SELECT (1 << 1)
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#define SPINOR_QE_USE_BIT6 (1 << 2)
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#define SPINOR_HAVE_WRITE_STATUS2 (1 << 3)
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#define SPINOR_WRITE_STATUS1_1BYTE (1 << 4)
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#define SPINOR_MFR_MICRON 0x2C
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#define SPINOR_MAX_ID_LEN 3
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typedef enum
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{
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XIP_VOLTE_TASK_ID,
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XIP_BT_TASK_ID,
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XIP_MAX_TASK_ID
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} XipTaskID;
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typedef void (*TaskSuspendCB)(void);
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typedef void (*TaskResumeCB)(void);
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struct spi_nor_info {
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char *name;
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uint8_t mfr_id;
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uint16_t dev_id;
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uint32_t page_size;
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uint32_t pages_per_blk;
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uint32_t total_size;
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uint32_t options;
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uint32_t max_mhz;
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};
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#define SPI_NOR_INFO(nm, mid, did, pagesz, pg_per_blk, size, opts, _max_mhz) \
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{ .name = (nm), .mfr_id = (mid), .dev_id = (did),\
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.page_size = (pagesz), .pages_per_blk = (pg_per_blk),\
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.total_size = (size), .options = (opts), \
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.max_mhz = (_max_mhz), }
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struct spi_flash_chip *spi_nor_init(struct qspi_host *host, int cs,
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int rx_mode, int tx_mode, int qpi);
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unsigned int spi_nor_do_write(unsigned int addr, unsigned int buf_addr,unsigned int size, BOOL flashType);
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unsigned int spi_nor_do_read(unsigned int addr, unsigned int buf_addr, unsigned int size, BOOL flashType);
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unsigned int spi_nor_do_erase(unsigned int addr, unsigned int size, BOOL flashType);
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int spi_nor_do_erase_4k(unsigned int addr, unsigned int size, BOOL flashType);
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int spi_nor_test(void);
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int qspi_abort_handle(void);
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struct spi_flash_chip *get_spi_flash_chip(unsigned char num);
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int spi_nor_read_status1(struct spi_flash_chip *chip, uint8_t *status);
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int spi_nor_read_status2(struct spi_flash_chip *chip, uint8_t *status);
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int spi_nor_write_status1(struct spi_flash_chip *chip, uint8_t *buf,uint8_t count);
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int spi_nor_write_status2(struct spi_flash_chip *chip, uint8_t *buf);
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int spi_nor_write_enable(struct spi_flash_chip *chip);
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#ifdef SUPPORT_FBP
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int spi_nor_write_volatile_status_register_enable(struct spi_flash_chip *chip);
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#endif
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int spi_nor_read_sfdp(struct spi_flash_chip *chip, int addr, int size, uint8_t *rbuf);
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#endif
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