173 lines
5.2 KiB
C
173 lines
5.2 KiB
C
/*================================================================
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Copyright (c) 2022, Quectel Wireless Solutions Co., Ltd. All rights reserved.
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Quectel Wireless Solutions Proprietary and Confidential.
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=================================================================*/
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/*=================================================================
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EDIT HISTORY FOR MODULE
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This section contains comments describing changes made to the module.
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Notice that changes are listed in reverse chronological order.
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WHEN WHO WHAT, WHERE, WHY
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------------ ------- -------------------------------------------------------------------------------
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19/04/2022 Fias.fan Added PWM interface
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=================================================================*/
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#ifndef _QUEC_PWM_H
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#define _QUEC_PWM_H
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//#include "pwm.h"
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#include "quec_common.h"
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//#include "quec_memory.h"
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#include "quec_debug.h"
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#include "quec_cust_feature.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined QUEC_PWM_ENBALE
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#define QUEC_PWM_LOG_ENABLE
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#define QUEC_PWM_CLK_FREQ_DEFAULT 203125
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#define QUEC_DATA_TRANSFOR_POLLING_TIMR 5000 //5s
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//#define QUEC_NET_STATUS_PWM PWM_DEVICE_2
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typedef struct lwip_data_tx_rx_struct
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{
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unsigned long long rx_all;
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unsigned long long tx_all;
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}Lwip_data_tx_rx;
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extern UINT8 quec_pwm_datatransfor_flag;
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extern unsigned long long quec_globle_rx_byte_all;
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extern unsigned long long quec_globle_tx_byte_all;
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extern unsigned char quec_net_status_pwm;
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extern QuecOSStatus quec_pwm_init(void);
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extern QuecOSStatus quec_net_datatransfor_polling_timer_start(void);
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extern void quec_net_datatransfor_polling_timer_cb(void);
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typedef enum
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{
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QUEC_PWM_CLK_SRC_13M,
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QUEC_PWM_CLK_SRC_32K,
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}QUEC_PWM_CLK_SRC_E;
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typedef struct
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{
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unsigned long pwm_psc; //(value:1~64) example:choose 13 MHz, maximum is 13000000/1=13 MHz, minimum is 13000000/64 = 203,125 KHz.
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unsigned short high_one_cycle_duration; //Time that PWM_OUT puls is high in term of "clk_freq" define above. This value is written to PWDUTY register.
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unsigned short total_one_cycle_duration; //(1<value< 1023) One cycle of PWM_OUT puls (high and low) in term of "clk_freq" define above. This value is written to PERVAL register.
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QUEC_PWM_CLK_SRC_E clk_src; //The clock source,32KHz and 13MHz
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}QUEC_PWM_CONFIG_EX;
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typedef enum
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{
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QUEC_PWM_SHUTDOWN_GRACEFULLY,
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QUEC_PWM_SHUTDOWN_ABRUPTLY
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} QUEC_PWM_SD_E;
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typedef enum
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{
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QUEC_PWM_OUT_SET_BY_DCYCLE,
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QUEC_PWM_OUT_SET_FOR_FULL_PERIOD
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} QLEC_PWM_OUT_E;
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typedef enum
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{
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QUEC_PWM_RC_OK,
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QUEC_PWM_RC_ERROR,
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QUEC_PWM_RC_ILLEGALL_FREQUENCY,
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QUEC_PWM_RC_ILLEGALL_DUTY_CYCLE,
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QUEC_PWM_RC_ILLEGALL_DEVICE_NUMBER
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} QUEC_PWM_RETURN_CODE_E;
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typedef struct
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{
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unsigned long control;
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unsigned long duty_cycle;
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unsigned long period_val;
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} QUEC_PWM_REGISTERED_T;
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struct QUEC_PWM_MAP_GPIO_S
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{
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unsigned int gpio_num;
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unsigned int pwm_num;
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unsigned int gpio_fun;
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};
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typedef struct
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{
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QUEC_PWM_SD_E shutdown; // Graceful(0) or Abruptly(1)
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unsigned long clk_freq; // The resolution is multiply of 203,125. 13,000,000 MHz is the maximum, minimum is 13000000/64 = 203,125 KHz.
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QLEC_PWM_OUT_E pwm_out;
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unsigned short high_one_cycle_duration; //Time that PWM_OUT puls is high in term of "clk_freq" define above. This value is written to PWDUTY register.
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unsigned short total_one_cycle_duration; //One cycle of PWM_OUT puls (high and low) in term of "clk_freq" define above. This value is written to PERVAL register.
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QUEC_PWM_CLK_SRC_E clk_src;
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}QUEC_PWM_CONFIG_T;
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typedef enum
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{
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QUEC_PWM_DEVICE_0 = 0,
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QUEC_PWM_DEVICE_1,
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QUEC_PWM_DEVICE_2,
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QUEC_PWM_DEVICE_3,
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QUEC_PWM_MAX_DEVICE
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} QUEC_PWM_DEVICE_NUM_E;
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typedef enum QL_PWM_CYCLE_RANGE_ENUM
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{
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QL_PWM_CYCLE_ABOVE_1US,
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QL_PWM_CYCLE_ABOVE_10US,
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QL_PWM_CYCLE_ABOVE_1MS
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} QL_PWM_CYCLE_RANGE_E;
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typedef enum
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{
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QL_PWM_CLK_SRC_13M,
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QL_PWM_CLK_SRC_32K,
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}QL_PWM_CLK_SRC_E;
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typedef struct
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{
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unsigned long pwm_psc; //(value:1~64) example:choose 13 MHz, maximum is 13000000/1=13 MHz, minimum is 13000000/64 = 203,125 KHz.
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unsigned short high_one_cycle_duration; //Time that PWM_OUT puls is high in term of "clk_freq" define above. This value is written to PWDUTY register.
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unsigned short total_one_cycle_duration; //(1<value< 1023) One cycle of PWM_OUT puls (high and low) in term of "clk_freq" define above. This value is written to PERVAL register.
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QL_PWM_CLK_SRC_E clk_src; //The clock source,32KHz and 13MHz
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}QL_PWM_CONFIG_EX;
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void quec_pwm_apb_bus_clk_enable(QUEC_PWM_DEVICE_NUM_E pwm_num);
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int quec_gpio_mapto_pwm_device_num(unsigned int gpio_num);
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void quec_pwm_apb_bus_clk_disable(QUEC_PWM_DEVICE_NUM_E pwm_num);
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int quec_pwm_enable(unsigned int gpio_num);
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int quec_pwm_disable(unsigned int gpio_num);
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int quec_pwm_pinmux_configure(unsigned int gpio_num);
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QUEC_PWM_RETURN_CODE_E quec_pwm_configure( QUEC_PWM_DEVICE_NUM_E pwm_num , QUEC_PWM_CONFIG_T *configuration );
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int quec_pwm_config_plus_ex(unsigned int gpio_num,QL_PWM_CONFIG_EX *pwm_parameter);
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#endif
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#ifdef __cplusplus
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} /*"C" */
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#endif
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#endif
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