66 lines
2.3 KiB
C
66 lines
2.3 KiB
C
/*------------------------------------------------------------
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(C) Copyright [2006-2008] Marvell International Ltd.
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All Rights Reserved
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------------------------------------------------------------*/
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#if !defined(XIRQ_CONFIG_H)
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#define XIRQ_CONFIG_H
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#define NUM_SWI 16
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#define NUM_RI 8
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#define NUM_XSWI 1
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#define NUM_EIRQ 3
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/*Fix coverity[overrun-call]*/
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#if defined (EDEN_1928) || defined (NEZHA3_1826)
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#define MAX_NUM_HWI 77
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#else
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#define MAX_NUM_HWI 64
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#endif
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#define NUM_HWI_REGS ((MAX_NUM_HWI + 15)/16)
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#define SWI0_ID 0
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#define RI0_ID (SWI0_ID + NUM_SWI)
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#define XSWI_ID (RI0_ID + NUM_RI)
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#define EIRQ0_ID (XSWI_ID + NUM_XSWI)
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#define SWI_EIRQ_ID (EIRQ0_ID)
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#define RI_EIRQ_ID (EIRQ0_ID + 1)
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#define XSWI_EIRQ_ID (EIRQ0_ID + 2)
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#define HWI0_ID (EIRQ0_ID + NUM_EIRQ)
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#define MAX_NUM_IRQ (NUM_SWI + NUM_RI + NUM_XSWI + NUM_EIRQ + MAX_NUM_HWI)
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//#if defined(_TAVOR_HARBELL_) || defined (SILICON_PV2)
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#if defined (SILICON_PV2)
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#ifdef PHS_SW_DEMO_TTC //20080828
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#include "intc_config.h"
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/* Dummy base address for simulated interrupt controller. */
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#if defined (EDEN_1928) || defined (NEZHA3_1826)
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#define IRQCTRL_BASE_ADDR 0xD4041000//0xD0231000////pei changed
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#else
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gg
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#define IRQCTRL_BASE_ADDR 0xD4031000
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#endif
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#define INTC_CONFIGURE_WITH_3_ARGUMENTS // Matches the SINTC definition, see sintc.h
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#define XIRQ_STICKY_OFFSET 0x8f8
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#define XIRQ_EDGELEVEL_OFFSET 0x8f0
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#else
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/* Dummy base address for simulated interrupt controller. */
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#define IRQCTRL_BASE_ADDR 0xD4000800
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#define INTC_CONFIGURE_WITH_3_ARGUMENTS // to be used for API mismatch identification until resolved
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#define XIRQ_D2_SPECIFIC
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#define XIRQ_STICKY_OFFSET 0x500
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#define XIRQ_EDGELEVEL_OFFSET 0x508
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#endif //PHS_SW_DEMO_TTC
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#endif
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#if defined(SILICON_TTC)
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#include "intc_config.h"
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/* Dummy base address for simulated interrupt controller. */
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#define IRQCTRL_BASE_ADDR 0xD4031000
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#define INTC_CONFIGURE_WITH_3_ARGUMENTS // Matches the SINTC definition, see sintc.h
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#define XIRQ_STICKY_OFFSET 0x8f8
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#define XIRQ_EDGELEVEL_OFFSET 0x8f0
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#endif
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#endif // XIRQ_CONFIG_H
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