106 lines
4.7 KiB
C
106 lines
4.7 KiB
C
/*------------------------------------------------------------
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(C) Copyright [2006-2008] Marvell International Ltd.
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All Rights Reserved
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------------------------------------------------------------*/
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/******************************************************************************
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**
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** INTEL CONFIDENTIAL
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** Copyright 2006 Intel Corporation All Rights Reserved.
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** The source code contained or described herein and all documents related to the source code ("Material") are owned
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** by Intel Corporation or its suppliers or licensors. Title to the Material remains with Intel Corporation or
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** its suppliers and licensors. The Material contains trade secrets and proprietary and confidential information of
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** Intel or its suppliers and licensors. The Material is protected by worldwide copyright and trade secret laws and
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** treaty provisions. No part of the Material may be used, copied, reproduced, modified, published, uploaded, posted,
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** transmitted, distributed, or disclosed in any way without Intel's prior express written permission.
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**
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** No license under any patent, copyright, trade secret or other intellectual property right is granted to or
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** conferred upon you by disclosure or delivery of the Materials, either expressly, by implication, inducement,
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** estoppel or otherwise. Any license under such intellectual property rights must be express and approved by
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** Intel in writing.
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**
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** Unless otherwise agreed by Intel in writing, you may not remove or alter this notice or any other notice embedded
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** in Materials by Intel or Intel's suppliers or licensors in any way.
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**
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** FILENAME: bsp_util.h
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**
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** Authors: Abraham Coifman
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**
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** PURPOSE:
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**
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******************************************************************************/
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#include "global_types.h"
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#include "mmap_phy.h"
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#define NAND_BLOCK_SIZE 0x4000
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#define DDR_LAST_ADDRESS_BOERNE 0xBFFFFFFF /* The address of the last byte of the DDR when accessed from Boerne */
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#define DDR_LAST_ADDRESS_COMM 0xD0FFFFFF /* The address of the last byte of the DDR when accessed from COMM */
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#define BOERNE_ADDR(x) (DDR_LAST_ADDRESS_BOERNE - (DDR_LAST_ADDRESS_COMM - x)) /* Macro translates a COMM address to its BOERNE value */
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#define COMM_BLOCK_ARBEL_START (3457)
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#define COMM_BLOCK_ARBEL_LENGTH (448)
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#define COMM_BLOCK_ARBEL_END (COMM_BLOCK_ARBEL_START + COMM_BLOCK_ARBEL_LENGTH - 1) //3904
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/* MSA Image */
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#define COMM_BLOCK_GB_START (COMM_BLOCK_ARBEL_END+1) //3905
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#define COMM_BLOCK_GB_LENGTH (64)
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#define COMM_BLOCK_GB_END (COMM_BLOCK_GB_START + COMM_BLOCK_GB_LENGTH - 1) //3968
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#define RESET_ROUTINE_GB_ADDR BOERNE_ADDR(0xD0FFFFC0) /* The address in which GB starts after COMM is released from reset */
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#define RESET_ROUTINE_ARBEL_ADDR BOERNE_ADDR(0xD0FFFFE0) /* The address in which Arbel starts after COMM is released from reset */
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#define RESET_ROUTINE_GB { 0xE108, 0x8000 , 0xE148, 0xD0F8, 0x0050 } /* PO.L 0x8000; PO.H 0xD0F8 ; PC=PO, GB will jump to 0xd0f88000 */
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#define RESET_ROUTINE_ARBEL {0xE51FF004, ARBEL_BASE_ADDRESS, 0xA1A2A3A4, 0xA1A2A3A4} /* remember: LITTLE endian! 0xE51FF004 = MOV to PC the long next to me */
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#define COMM_IMAGE_GB_NOR_START 0x13F00000 //0x10800000
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#define COMM_IMAGE_GB_ADDR_DST BOERNE_ADDR(0xD0F00000) // we will page GB image into DDR.
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//Image word size
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#define COMM_IMAGE_GB_SIZE_WORD ((COMM_BLOCK_GB_LENGTH*NAND_BLOCK_SIZE) / 4)
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//Image word size
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#define COMM_IMAGE_ARBEL_NOR_START 0x13800000 //0x10100000
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#define COMM_IMAGE_ARBEL_SIZE_WORD ((COMM_BLOCK_ARBEL_LENGTH*NAND_BLOCK_SIZE) / 4 )
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#define COMM_IMAGE_ARBEL_ADDR_DST ARBEL_BASE_ADDRESS // we will page ARBEL image into DDR.
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typedef struct arbelResetRoutineS
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{
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unsigned long Arbel_ResetRoutine[8]; /* LONGs - 32 bit */
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} ARBEL_ResetRoutineS ;
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typedef struct GbResetRoutineS
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{
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unsigned short Gb_ResetRoutine[16]; /* Shorts */
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} GB_ResetRoutineS ;
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typedef enum ResetActionE_TAG
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{
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RESET_ACT_LEVEL_INACTIVE = 0, // could run
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RESET_ACT_LEVEL_ACTIVE = 1, // in reset
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RESET_ACT_PULSE_INACT_ACT = 0xFF // inactive __active__ inactive
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}ResetActionE;
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/*
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typedef enum ResetSiteE_TAG
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{
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RESET_SITE_LEVEL_INACTIVE = 0, // could run
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RESET_SITE_LEVEL_ACTIVE = 1, // in reset
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RESET_SITE_PULSE_INACT_ACT = 0xFF // inactive __active__ inactive
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}ResetSiteE;
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*/
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typedef enum bspUtil_ReturnCodeE_TAG
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{
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BSP_UTIL_RC_OK = 0,
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BSP_UTIL_RC_NO_ACTION = -100
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} bspUtil_ReturnCodeE;
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void tavorOBMalike(void);
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bspUtil_ReturnCodeE mateSideReset(ResetActionE resetAction);
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void copyCommSideImage (void);
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void commSideResetExt(void *p);
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void mateSideResetTest(void *);
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void copyCommSideImageTest (void *);
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