417 lines
10 KiB
C
417 lines
10 KiB
C
/*------------------------------------------------------------
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(C) Copyright [2006-2008] Marvell International Ltd.
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All Rights Reserved
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------------------------------------------------------------*/
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/*******************************************************************************
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* MODULE HEADER FILE
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********************************************************************************
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* Title: pmu.h
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*
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* Filename: pmu.h
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*
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* Partial PMU Header file
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*
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* Authors: Yabbo Shuki
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* Abraham Coifman
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*
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* Description:
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*
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* Last Updated:
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*
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* Notes: this package would be replaced by the cpmu package
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*******************************************************************************/
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#ifndef _PMU_H_
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#define _PMU_H_
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#include "global_types.h"
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/* // acoifman change
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#include "pmu_config.h"
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*/// acoifman change
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#ifdef _PMU_NO_EXTERN_
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#define MODULE_ID DIAGM_PMU_H
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#endif
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/*----------- Global defines -------------------------------------------------*/
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/*----------- Global macro definitions ---------------------------------------*/
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/*----------- Global type definitions ----------------------------------------*/
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typedef enum
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{
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PMU_RC_WRONG_VALUE = -100,
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PMU_RC_OK = 0,
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PMU_RC_POR,
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PMU_RC_EMR,
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PMU_RC_WDTR = (PMU_RC_EMR+2)
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}PMU_ReturnCode;
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typedef enum
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{
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PMU_PLL_312_XSC_312 = 0,
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PMU_PLL_312_XSC_104,
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PMU_PLL_104_XSC_104,
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PMU_PLL_312_XSC_312_MSA_156,
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PMU_PLL_208_XSC_208_MSA_208
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}PMU_Frequency_Modes;
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typedef enum
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{
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PMU_BOTH_CLOCKS_OFF = 0,
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PMU_ONLY_FUNCTIONAL_CLOCK_ON,
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PMU_ONLY_APB_CLOCK_ON,
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PMU_BOTH_CLOCKS_ON
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}PMU_BothClocksStatus;
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//ICAT EXPORTED ENUM
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typedef enum
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{
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PMU_POR = 1,
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PMU_EMR,
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PMU_WDTR = (PMU_EMR+2)
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}PMU_LastResetStatus;
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typedef enum
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{
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PMU_PWM2C1 = 0,
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PMU_PWM2C0,
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PMU_PWM1C1,
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PMU_PWM1C0,
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PMU_I2S = 7,
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PMU_USIM,
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#if !defined (_HERMON_B0_SILICON_)
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PMU_SCI3,
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PMU_SCI2,
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PMU_SCI1,
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#endif
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PMU_ICP=12,
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PMU_GPC = 14,
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PMU_SSP,
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#if defined (_HERMON_B0_SILICON_)
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PMU_GPIO=17,
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#endif
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PMU_I2C = 18,
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PMU_KEYPAD,
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PMU_MSHC,
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PMU_MSL = 22,
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PMU_DSYTMR,
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PMU_NDSYTMR,
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PMU_ETM = 26,
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PMU_MMC,
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PMU_USB,
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PMU_UART3,
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PMU_UART2,
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PMU_UART1,
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PMU_NONE
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}PMUPeripherals;
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#if defined(_HERMON_B0_SILICON_)
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typedef enum
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{
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APB_UART1 = 0,
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APB_UART2,
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APB_UART3,
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APB_I2C,
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APB_IPC,
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APB_USB,
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APB_ICP,
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APB_EXT_PERIPHERAL_0,
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APB_MMC,
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APB_KEYPAD,
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APB_USIM = 10,
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APB_EXT_PERIPHERAL_5,
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APB_PWM,
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APB_RESERVED_0,
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APB_EGPIO,
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APB_RESERVED_1,
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APB_MSL,
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APB_RTC,
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APB_GPIO,
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APB_INTC,
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APB_EXT_PERIPHERAL_1 = 20,
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APB_NDSYTMR,
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APB_ONE_WIRE,
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APB_SSP_O_1,
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APB_SSP_2,
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APB_EXT_PERIPHERAL_2,
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APB_EXT_PERIPHERAL_3,
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APB_EXT_PERIPHERAL_4,
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APB_LCD_IF,
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APB_EXT_PERIPHERAL_6,
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APB_EXT_PERIPHERAL_7 = 30,
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APB_MSHC,
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APB_CAM_BIT,
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APB_NONE
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}APBPeripherals;
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#else
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typedef enum
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{
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APB_UART1 = 0,
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APB_UART2,
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APB_UART3,
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APB_I2C,
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APB_IPC,
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APB_USB,
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APB_ICP,
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APB_SSP,
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APB_MMC,
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APB_KEYPAD,
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APB_USIM,
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APB_LCD_IF,
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APB_PWM,
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APB_SCI1,
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APB_SCI2,
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APB_SCI3,
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APB_MSL,
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APB_RTC,
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APB_GPIO,
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APB_INTC,
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APB_DSYTMR,
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APB_NDSYTMR,
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APB_ONE_WIRE,
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APB_EXT_PERIPHERAL_0,
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APB_EXT_PERIPHERAL_1,
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APB_EXT_PERIPHERAL_2,
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APB_EXT_PERIPHERAL_3,
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APB_EXT_PERIPHERAL_4,
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APB_EXT_PERIPHERAL_5,
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APB_EXT_PERIPHERAL_6,
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APB_EXT_PERIPHERAL_7,
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APB_MSHC,
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APB_CAM_BIT,
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APB_NONE
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}APBPeripherals;
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#endif
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#ifdef _MANITOBA_SILICON_
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#define APB_SIM APB_EXT_PERIPHERAL_0
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#define APB_ABTH APB_EXT_PERIPHERAL_2
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#define APB_XCRG APB_EXT_PERIPHERAL_3
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#define APB_TCU_SC APB_EXT_PERIPHERAL_4
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#endif
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#ifdef _HERMON_A0_SILICON_
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#ifdef _HERMON_B0_SILICON_
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#define APB_ME APB_EXT_PERIPHERAL_2
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#define APB_GENERAL APB_EXT_PERIPHERAL_3
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#define APB_WCIPHER APB_EXT_PERIPHERAL_4
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#define APB_SIM APB_EXT_PERIPHERAL_6
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#define APB_GSSP APB_EXT_PERIPHERAL_6
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#define APB_CAMIF APB_EXT_PERIPHERAL_7
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#else
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// EXT APB
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#define APB_CSSP_0 APB_EXT_PERIPHERAL_0 /*shared*/
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#define APB_CSSP_1 APB_EXT_PERIPHERAL_0 /*shared*/
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#define APB_CSSP_2 APB_EXT_PERIPHERAL_1
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#define APB_CSSP_3 APB_EXT_PERIPHERAL_2
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#define APB_GENERAL APB_EXT_PERIPHERAL_3
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#define APB_WCIPHER APB_EXT_PERIPHERAL_4
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#define APB_LCD_0 APB_EXT_PERIPHERAL_5 /*shared*/
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#define APB_LCD_1 APB_EXT_PERIPHERAL_5 /*shared*/
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#define APB_TCU APB_EXT_PERIPHERAL_6
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#define APB_CAMIF APB_EXT_PERIPHERAL_7
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#endif
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#define APB_TCU_SC APB_TCU
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#endif
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typedef enum
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{
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BOTH_PWM2C1 = 0,
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BOTH_PWM2C0,
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BOTH_PWM1C1,
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BOTH_PWM1C0,
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BOTH_I2S,
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BOTH_USIM,
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#ifndef _HERMON_B0_SILICON_
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BOTH_SCI3,
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BOTH_SCI2,
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BOTH_SCI1,
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#endif
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BOTH_ICP,
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BOTH_GPC,
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BOTH_SSP,
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BOTH_I2C,
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BOTH_KEYPAD,
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BOTH_MSHC,
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BOTH_MSL,
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BOTH_DSYTMR,
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BOTH_NDSYTMR,
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BOTH_ETM,
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BOTH_MMC,
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BOTH_USB,
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BOTH_UART3,
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BOTH_UART2,
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BOTH_UART1,
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BOTH_IPC,
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BOTH_LCD_IF,
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BOTH_RTC,
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BOTH_GPIO,
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BOTH_INTC,
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BOTH_ONE_WIRE,
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BOTH_EXT_PERIPHERAL_0,
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BOTH_EXT_PERIPHERAL_1,
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BOTH_EXT_PERIPHERAL_2,
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BOTH_EXT_PERIPHERAL_3,
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BOTH_EXT_PERIPHERAL_4,
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BOTH_EXT_PERIPHERAL_5,
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BOTH_EXT_PERIPHERAL_6,
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BOTH_EXT_PERIPHERAL_7,
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BOTH_CAM_BIT
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}BothPeripherals;
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#ifdef _MANITOBA_SILICON_
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#define BOTH_SIM BOTH_EXT_PERIPHERAL_0
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#define BOTH_ABTH BOTH_EXT_PERIPHERAL_2
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#define BOTH_XCRG BOTH_EXT_PERIPHERAL_3
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#define BOTH_TCU_SC BOTH_EXT_PERIPHERAL_4
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#endif
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typedef enum
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{
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PMU_XPCR = 0,
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PMU_XPSR,
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PMU_FCCR,
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PMU_POCR,
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PMU_POSR,
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PMU_UCCR,
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PMU_CGCR,
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PMU_XPRR1,
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PMU_XPRR2,
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PMU_XCGR,
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PMU_XRSR,
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PMU_XDCR,
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PMU_GPCR,
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PMU_XDWR
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}PMURegistersList;
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typedef enum
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{
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PMU_OFF = 0,
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PMU_ON,
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PMU_ON_PLUS_DMA
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}PMUOnOff;
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typedef enum
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{
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PMU_VCTCXO_STABLE_TIME = 0,
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PMU_PLL_LOCK_TIME,
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PMU_TI4,
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PMU_TO2
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}PMUParamreters;
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typedef enum
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{
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PMU_PORT_ZERO = 0,
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PMU_PORT_ONE,
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PMU_PORT_TWO,
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PMU_PORT_THREE
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}PMUWakeupPortNumber;
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typedef enum
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{
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PMU_CORE_ONLY = 0,
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PMU_PX_IDLE,
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PMU_DROWSY,
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PMU_DROWSY_AND_VCTCXOSD,
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PMU_NO_SLEEP
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}PMUSleepModes;
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typedef enum
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{
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PMU_NO_FORCE = 0,
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PMU_FORCE
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}PMUForce;
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typedef enum
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{
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PMU_MEMC_DIV = 0,
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PMU_I2S_DIV,
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PMU_MSHC_DIV,
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PMU_GPC_DIV
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}PMUSfcDividers;
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typedef struct
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{
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UINT8 pll_mf;
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UINT8 xsc_div;
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UINT8 dsp_div;
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UINT8 px_div;
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UINT8 px2dsp_div;
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UINT8 dpb2dsp_div;
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UINT8 apb_div;
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}PMUFrequencies;
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/*----------- Extern definition ----------------------------------------------*/
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#undef EXTERN
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#ifndef _PMU_NO_EXTERN_
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#define EXTERN extern
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#else
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#define EXTERN
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#endif /* _PMU_NO_EXTERN_ */
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//GYU GCSR0
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#define M_SetBit(x,y) (*(volatile UINT32 *)y) = (*(volatile UINT32 *)y) | (1<<x)
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#define M_ClrBit(x,y) (*(volatile UINT32 *)y) = (*(volatile UINT32 *)y) & ~(1<<x)
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#ifdef _MANITOBA_SILICON_
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#define M_GCSR0SetBit(x) PMUPeripheralAPBClock(APB_XCRG, PMU_ON);M_SetBit(x,0x42a00800);PMUPeripheralAPBClock(APB_XCRG, PMU_OFF);
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#define M_GCSR0ClrBit(x) PMUPeripheralAPBClock(APB_XCRG, PMU_ON);M_ClrBit(x,0x42a00800);PMUPeripheralAPBClock(APB_XCRG, PMU_OFF);
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#else
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#define M_GCSR0SetBit(x)
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#define M_GCSR0ClrBit(x)
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#endif
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/*----------- Global variable declarations -----------------------------------*/
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/*----------- Global constant definitions ------------------------------------*/
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#define INTC_ICHP_REG 0x40d00018L //ICHP register addres
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/*----------- Global function prototypes -------------------------------------*/
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//void PMUPeripheralFunctionalClock(PMUPeripherals peripheralName, PMUOnOff onOff);
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//void PMUPeripheralAPBClock(APBPeripherals peripheralName, PMUOnOff onOff);
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//void PMUPeripheralBothClocks(BothPeripherals peripheralName, PMUOnOff onOff);
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//void PMUPeripheralReset(BothPeripherals peripheralName);
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//void PMUResetAllPeripherals(void);
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//PMUOnOff PMUPeripheralFunctionalClockStatus(PMUPeripherals peripheralName);
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//PMUOnOff PMUPeripheralAPBClockStatus(APBPeripherals peripheralName);
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//PMU_BothClocksStatus PMUPeripheralBothClocksStatus(BothPeripherals peripheralName);
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//void PMUDSPReset(BOOL releaseFromReset);
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//void PMUDSPResetRelease(void);
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//void PMUBBLogicReset(BOOL releaseFromReset);
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//void PMUBBLogicResetRelease(void);
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//void PMUMemcClock(PMUOnOff onOff, PMUMemcUsers memcUser);
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//void PMUMSAClock(PMUOnOff onOff, PMUMsaUsers msaUser);
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//BOOL PMUMsaClockUsersStatus(void);
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//void PMUBBLogicClock(PMUOnOff onOff, PMUBBLogicUsers bbLogicUser);
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//BOOL PMUIsApbRequired(void);
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//void PMUAllowApbIdleMode(BOOL idleModeAllow);
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//BOOL PMUIsPxIdleAllowed(void);
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//void PMUSetSleepConditions(PMUSleepModes sleepMode);
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//void PMUSleepExit(void);
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//PMU_ReturnCode PMUMfcReq(PMUFrequencies *frequencyCombination, PMUForce forceMfc);
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//PMU_ReturnCode PMUSfcReq(PMUSfcDividers clockDivider, UINT32 divValue);
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//void PMUDrowsyWakeupPortMask(PMUWakeupPortNumber portNumber, BOOL maskUnmask);
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//void PMUMSLClockDetectorControl(PMUOnOff onOff);
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//PMU_LastResetStatus PMULastReset(void);
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//void PMUForceClockMode(PMUOnOff onOff);
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//void PMUAPBForceClockMode(PMUOnOff onOff);
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//void PMUAPBPowerConsumptionMode(PMUOnOff onOff);
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//UINT32 PMUWriteReg(PMURegistersList pmuReg, UINT32 value, UINT32 mask);
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//UINT32 PMUReadReg(PMURegistersList pmuReg);
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//UINT32 PMUMultiClock(UINT32 value, UINT32 mask);
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//PMU_ReturnCode PMUPhase1Init(void);
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//UINT8 PMUGetVCXOStandbyTime(void);
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//void PMUSetMfcConditions(UINT32 sysFreqConfig);
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//void PMUMfcExit(void);
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//void pmuEnableETMClkWorkAround(void);
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//void pmuDisableETMClkWorkAround(void);
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//BOOL pmuIsIdleAllowed(void);
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//void PMUSSPclockSourceControlWrite ( UINT32 clkSrcCtrl );
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//
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#undef EXTERN
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#endif /* _PMU_H_ */
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