1594 lines
59 KiB
C
1594 lines
59 KiB
C
/*------------------------------------------------------------
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(C) Copyright [2006-2008] Marvell International Ltd.
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All Rights Reserved
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------------------------------------------------------------*/
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/*--------------------------------------------------------------------------------------------------------------------
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INTEL CONFIDENTIAL
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Copyright 2006 Intel Corporation All Rights Reserved.
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The source code contained or described herein and all documents related to the source code ("Material") are owned
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by Intel Corporation or its suppliers or licensors. Title to the Material remains with Intel Corporation or
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its suppliers and licensors. The Material contains trade secrets and proprietary and confidential information of
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Intel or its suppliers and licensors. The Material is protected by worldwide copyright and trade secret laws and
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treaty provisions. No part of the Material may be used, copied, reproduced, modified, published, uploaded, posted,
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transmitted, distributed, or disclosed in any way without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual property right is granted to or
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conferred upon you by disclosure or delivery of the Materials, either expressly, by implication, inducement,
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estoppel or otherwise. Any license under such intellectual property rights must be express and approved by
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Intel in writing.
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-------------------------------------------------------------------------------------------------------------------*/
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/***************************************************************************
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* MODULE IMPLEMENTATION FILE
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****************************************************************************
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*
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* Filename: loadTable.c
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*
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* The OBM is responsible to copy image from flash to the DDR.
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* It doesn't know about real image size and always copy the maximum 7MB.
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* The problems:
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* - long time for copying (about 2 sec),
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* - all ERR/spy/debug buffers are overwriten.
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*
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* SOLUTION:
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* Put the Image BEGIN and END address onto predefined area - offset_0x1C0 size 0x40
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* Add the the text-signature to recognize are these addresses present in image or not.
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* The signature is following the BEGIN/END and is next ":BEGIN:END:LOAD_TABLE_SIGNATURE"
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* OBM should check signature in flash and if it is present MAY use the size=(END-BEGIN).
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* If signature is invalid the default 7MB is used.
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* The IMAGE_END region added into scatter file
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*
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******************************************************************************/
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#define _LOAD_TABLE_C_
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#include "global_types.h"
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#include "hal_cfg.h"
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#include <string.h>
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#include "asserts.h"
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#include "bsp_util.h"
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#include "EE_Postmortem.h"
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#include "loadTable.h"
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#ifndef CRANE_MCU_DONGLE
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#include "nvmClient_ttc.h"
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#endif
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#include "ptable.h"
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#include "UART.h"
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#include "quec_cust_feature.h"
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// NOTICE: have to update LT_ANTI_ROLLBACK_VER once loadtable updated
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// to force do anti-rollback check in boot33, avoid loadtable unmatch caused fatal issue
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#define LT_ANTI_ROLLBACK_VER "20190904"
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#ifdef RUN_XIP_MODE
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#define LT_EXECUTE_MODE "XIP"
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#else
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#define LT_EXECUTE_MODE "PSRAM"
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#endif
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#if defined(ENABLE_CAT1_LG)
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#define LT_PS_MODE "LTEGSM"
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#ifdef CRANE_MCU_DONGLE
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//DM
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#if defined(LTEGSM_THIN)
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#define LT_RF_LOAD_ADDR_Z2 (0x7E000000)
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#define LT_RF_LOAD_ADDR_A0 (0x7E000000)
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#else
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#define LT_RF_LOAD_ADDR_Z2 (0x7E090000)
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#define LT_RF_LOAD_ADDR_A0 (0x7E090000)
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#endif
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#else//CRANE_MCU_DONGLE
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//FP
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#define LT_RF_LOAD_ADDR_Z2 (0x7E090000)
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#define LT_RF_LOAD_ADDR_A0 (0x7E090000)
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#endif//CRANE_MCU_DONGLE
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#else//ENABLE_CAT1_LG
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#define LT_PS_MODE "LTEONLY"
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#ifdef CRANE_MCU_DONGLE
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//0x0004C000-------DSP Reduce Sulog Buffer Size[304KB] {128KB ITCM + 248KB RAM}, RF Address[0x7E000000]
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//0x0003E000-------DSP Reduce Sulog Buffer Size[248KB] {248KB RAM }, RF Address[0x7E010000]
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//0x00040800-------DSP Reduce Sulog Buffer Size[258KB] {258KB RAM }, RF Address[0x7E010000],craneLR + WifiScan ;RF Address[0x7E000000],craneLG
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//0x00049000-------DSP Reduce Sulog Buffer Size[292KB] {292KB RAM }, RF Address[0x7E010000]
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//0x00052000-------DSP Reduce Sulog Size[328KB] {328KB RAM }, RF Address[0x7E010000]
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//0x00070000-------DSP ALLIN Size[448KB] {448KB RAM }, CraneL RF Address[0x7E065000],craneLS and craneLR RF Address[0x7E045000]
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#if (defined(CRANEL_8MRAM) || defined(CRANEL_4MRAM))//for craneL
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#if ((defined(SINGLE_SIM) && !defined(NOT_REDUCE_SULOG_DSP)) || defined(REDUCE_SULOG_IRBUF_DSP) || defined(CRANEL_AUDIOE_DSP))
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#if (defined(CRANELG_SUPPORT) || defined(CRANELRH_SUPPORT))
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#define LT_RF_LOAD_ADDR_Z2 (0x7E000000)//for reduce sulog dsp
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#define LT_RF_LOAD_ADDR_A0 (0x7E000000)
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#else
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#define LT_RF_LOAD_ADDR_Z2 (0x7E010000)//for reduce sulog dsp
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#define LT_RF_LOAD_ADDR_A0 (0x7E010000)
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#endif
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#else
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#if (defined(CRANELS_SUPPORT) && defined(REDUCE_SULOG_IRBUF_DSP))
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#define LT_RF_LOAD_ADDR_Z2 (0x7E010000)//for reduce sulog dsp
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#define LT_RF_LOAD_ADDR_A0 (0x7E010000)
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#elif (defined(CRANELS_SUPPORT) || defined(CRANELR_SUPPORT) || defined(CRANELG_SUPPORT))
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#define LT_RF_LOAD_ADDR_Z2 (0x7E045000)
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#define LT_RF_LOAD_ADDR_A0 (0x7E045000)
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#else
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#define LT_RF_LOAD_ADDR_Z2 (0x7E065000)
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#define LT_RF_LOAD_ADDR_A0 (0x7E065000)
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#endif
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#endif
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#else
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#define LT_RF_LOAD_ADDR_Z2 (0x7E090000)
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#define LT_RF_LOAD_ADDR_A0 (0x7E090000)
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#endif//CRANEL
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#else//CRANE_MCU_DONGLE
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#define LT_RF_LOAD_ADDR_Z2 (0x7E0C7000)
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#define LT_RF_LOAD_ADDR_A0 (0x7E0CB000)
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#endif//CRANE_MCU_DONGLE
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#endif
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#ifdef _32MNORFLASH
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#define FLASH_TRAIL (0x82000000)//32M flash
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#define NVM_PSIZE (0x00200000)//2M NVM
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#else
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#ifdef _8MNORFLASH
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#define FLASH_TRAIL (0x80800000)//8M flash
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#define NVM_PSIZE (0x00080000)//512K NVM
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#else
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#define FLASH_TRAIL (0x81000000)//16M flash
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#define NVM_PSIZE (0x00200000)//2M NVM
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#endif
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#endif
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#define FACTORY_PSIZE (0x00010000)//64K
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#define APN_START (0x80038000)//APN 32K
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#define APN_PSIZE (0x00008000)
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#define RD_START (0x80028000)//RD 64K
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#define RD_PSIZE (0x00010000)
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#if (defined(SINGLE_SIM) || defined(CRANELS_SUPPORT) || defined(CRANELG_SUPPORT))
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#define OTA_MT (0x00000001)
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#else
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#define OTA_MT (0xFFFFFFFF)
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#endif
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extern void INT_Initialize(void);
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#define LT_ENTRY_POINT (UINT32)&INT_Initialize
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#define LT_BRANCH_TO_ENTRY_OPCODE 0xE51FF004 /* LDR PC,[PC,#-4]*/
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extern UINT32 Load$$LOAD_TABLE$$Base;
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#define LT_IMAGE_BEGIN (UINT32)(&Load$$LOAD_TABLE$$Base)
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#ifndef RUN_XIP_MODE
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extern UINT32 Load$$PSRAM_END$$Base;
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#define LT_IMAGE_END (UINT32)(&Load$$PSRAM_END$$Base)
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#else
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#define LT_IMAGE_END (UINT32)(INVALID_ADDRESS)
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#endif
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#define LT_SIGNATURE_STRING LOAD_TABLE_SIGNATURE_STR
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//#if defined (_TAVOR_HARBELL_) || defined(SILICON_PV2) /* TtC - SHARED MEMORY - TBD */
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#if defined(SILICON_PV2) /* TtC - SHARED MEMORY - TBD */
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extern UINT32 Image$$DDR_NONCACHE_REGION$$Base;
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//extern UINT32 Image$$DDR_NONCACHE_REGION_AC_SHARE$$Base;
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//extern UINT32 Image$$DDR_NONCACHE_REGION_AC_SHARE_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_RELIABLE_RO_AREA$$Base;
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extern UINT32 Image$$DDR_RELIABLE_RO_AREA_ENDMARK$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_UL$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_DL_ENDMARKER$$Base;
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//bchang
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extern UINT32 Image$$DDR_RO_INIT_CODE$$Base;
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extern UINT32 Image$$DDR_DSP_RO$$Base;
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extern UINT32 Image$$DDR_DSP_RO_ENDMARK$$Base;
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extern UINT32 Image$$INIT_DATA_ENDMARKER$$Base;
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//extern UINT32 Image$$DDR_RW_DATA$$Base;
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extern UINT32 Image$$MSA_IR_REGION$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_PS_UL$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_PS_UL_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_PS_DL$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_PS_DL_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_UL$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_UL_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_DL$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_DL_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_PS_KeySection$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_PS_KeySection_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_KeySection$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_KeySection_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_DDR_PRIVATE_RW_AREA_ENDMARK$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_MEMLOG$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_UL$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_UL_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_DL$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_DL_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_KeySection$$Base;
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extern UINT32 Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_KeySection_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_RFBIN_RO$$Base;
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extern UINT32 Image$$DDR_RFS_AREA$$Base;
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extern UINT32 Image$$DDR_RFS_AREA_ENDMARK$$Base;
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#ifdef OPENCPU_SUPPORT
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extern UINT32 Image$$DDR_HEAP_GUARD$$Base;
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extern UINT32 Image$$DDR_HEAP_GUARD_ENDMARKER$$Base;
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extern UINT32 Image$$DDR_HEAP_GUARD$$Length;
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#define DDR_APP_IMAGE_BASE_ADDR (UINT32)(&Image$$DDR_HEAP_GUARD$$Base)
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#define DDR_APP_IMAGE_END_ADDR (UINT32)(&Image$$DDR_HEAP_GUARD_ENDMARKER$$Base)
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#define DDR_APP_IMAGE_LENGTH (UINT32)(&Image$$DDR_HEAP_GUARD$$Length)
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#endif
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extern UINT32 Image$$NVMBUF$$Base;
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extern UINT32 _diagIntIfQPtrData;
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extern UINT32 _diagIntIfReportsList;
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//xiaoke@20190303 - external LZOP RW compress
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//DDR_RW_DATA
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extern UINT32 Image$$DDR_RW_DATA$$Base;
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extern UINT32 Load$$DDR_RW_DATA$$Base;
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extern UINT32 Image$$DDR_RW_DATA$$Length;
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#define DDR_RW_DATA_IMAGE_ADDR (UINT32)(&Image$$DDR_RW_DATA$$Base)
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#define DDR_RW_DATA_LOAD_ADDR (UINT32)(&Load$$DDR_RW_DATA$$Base)
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#define DDR_RW_DATA_LENGTH (UINT32)(&Image$$DDR_RW_DATA$$Length)
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extern UINT32 Image$$DDR_HEAP_GUARD$$Base;
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extern UINT32 Image$$DDR_HEAP_ENDMARK$$Base;
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#define DDR_HEAP_GUARD_ADDR (UINT32)(&Image$$DDR_HEAP_GUARD$$Base)
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#define DDR_HEAP_GUARD_END_ADDR (UINT32)(&Image$$DDR_HEAP_ENDMARK$$Base)
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extern UINT32 Image$$PS_NONCACHE_DATA$$ZI$$Base;
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#define DDR_NONCACHE_RF_BK_ADDR (UINT32)(&Image$$PS_NONCACHE_DATA$$ZI$$Base)
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//MMI_DATA
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#ifdef PROJ_ASR_APP_001
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extern UINT32 Image$$MMI_DATA$$Base;
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extern UINT32 Load$$MMI_DATA$$Base;
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extern UINT32 Image$$MMI_DATA$$Length;
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extern UINT32 Image$$DDR_MMI_RO_EXEC$$Base;
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extern UINT32 Image$$DDR_MMI_RO_EXEC$$Length;
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#define MMI_DATA_IMAGE_ADDR (UINT32)(&Image$$MMI_DATA$$Base)
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#define MMI_DATA_LOAD_ADDR (UINT32)(&Load$$MMI_DATA$$Base)
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#define MMI_DATA_LENGTH (UINT32)(&Image$$MMI_DATA$$Length)
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#endif
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//PS_NONCACHE_DATA
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extern UINT32 Image$$PS_NONCACHE_DATA$$Base;
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extern UINT32 Load$$PS_NONCACHE_DATA$$Base;
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extern UINT32 Image$$PS_NONCACHE_DATA$$Length;
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#define PS_NONCACHE_DATA_IMAGE_ADDR (UINT32)(&Image$$PS_NONCACHE_DATA$$Base)
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#define PS_NONCACHE_DATA_LOAD_ADDR (UINT32)(&Load$$PS_NONCACHE_DATA$$Base)
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#define PS_NONCACHE_DATA_LENGTH (UINT32)(&Image$$PS_NONCACHE_DATA$$Length)
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//DDR_NONCACHE_USB
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extern UINT32 Image$$DDR_NONCACHE_USB$$Base;
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extern UINT32 Load$$DDR_NONCACHE_USB$$Base;
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extern UINT32 Image$$DDR_NONCACHE_USB$$Length;
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#define DDR_NONCACHE_USB_IMAGE_ADDR (UINT32)(&Image$$DDR_NONCACHE_USB$$Base)
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#define DDR_NONCACHE_USB_LOAD_ADDR (UINT32)(&Load$$DDR_NONCACHE_USB$$Base)
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#define DDR_NONCACHE_USB_LENGTH (UINT32)(&Image$$DDR_NONCACHE_USB$$Length)
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//PS_CODE_IN_PSRAM
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#ifdef RUN_XIP_MODE
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extern UINT32 Image$$PS_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PS_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PS_CODE_IN_PSRAM$$Length;
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#define PS_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PS_CODE_IN_PSRAM$$Base)
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#define PS_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PS_CODE_IN_PSRAM$$Base)
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#define PS_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PS_CODE_IN_PSRAM$$Length)
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extern UINT32 Image$$DDR_ITCM$$Base;
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extern UINT32 Load$$DDR_ITCM$$Base;
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extern UINT32 Image$$DDR_ITCM$$Length;
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#define DDR_ITCM_IMAGE_ADDR (UINT32)(&Image$$DDR_ITCM$$Base)
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#define DDR_ITCM_LOAD_ADDR (UINT32)(&Load$$DDR_ITCM$$Base)
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#define DDR_ITCM_LENGTH (UINT32)(&Image$$DDR_ITCM$$Length)
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#define DDR_ITCM_BACKUP_ADDR (UINT32)(&Image$$DDR_NONCACHE_USB$$Base)
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#ifdef CRANE_MCU_DONGLE
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#if (defined(LTEONLY_THIN_SINGLE_SIM_2MFLASH) || defined(CRANELS_8MRAM4MFLASH_MULTI_LOADTABLE))
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extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PSB_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Length;
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#define PSB_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Base)
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#define PSB_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSB_CODE_IN_PSRAM$$Base)
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#define PSB_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Length)
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extern UINT32 Image$$PSC_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PSC_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PSC_CODE_IN_PSRAM$$Length;
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#define PSC_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSC_CODE_IN_PSRAM$$Base)
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#define PSC_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSC_CODE_IN_PSRAM$$Base)
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#define PSC_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSC_CODE_IN_PSRAM$$Length)
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extern UINT32 Image$$PSD_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PSD_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PSD_CODE_IN_PSRAM$$Length;
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#define PSD_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSD_CODE_IN_PSRAM$$Base)
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#define PSD_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSD_CODE_IN_PSRAM$$Base)
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#define PSD_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSD_CODE_IN_PSRAM$$Length)
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extern UINT32 Image$$PSE_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PSE_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PSE_CODE_IN_PSRAM$$Length;
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#define PSE_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSE_CODE_IN_PSRAM$$Base)
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#define PSE_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSE_CODE_IN_PSRAM$$Base)
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#define PSE_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSE_CODE_IN_PSRAM$$Length)
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extern UINT32 Image$$PSF_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PSF_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PSF_CODE_IN_PSRAM$$Length;
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#define PSF_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSF_CODE_IN_PSRAM$$Base)
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#define PSF_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSF_CODE_IN_PSRAM$$Base)
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#define PSF_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSF_CODE_IN_PSRAM$$Length)
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extern UINT32 Image$$PLA_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PLA_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PLA_CODE_IN_PSRAM$$Length;
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#define PLA_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PLA_CODE_IN_PSRAM$$Base)
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#define PLA_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PLA_CODE_IN_PSRAM$$Base)
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#define PLA_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PLA_CODE_IN_PSRAM$$Length)
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extern UINT32 Image$$PLB_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PLB_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PLB_CODE_IN_PSRAM$$Length;
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#define PLB_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PLB_CODE_IN_PSRAM$$Base)
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#define PLB_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PLB_CODE_IN_PSRAM$$Base)
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#define PLB_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PLB_CODE_IN_PSRAM$$Length)
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extern UINT32 Image$$PLC_CODE_IN_PSRAM$$Base;
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extern UINT32 Load$$PLC_CODE_IN_PSRAM$$Base;
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extern UINT32 Image$$PLC_CODE_IN_PSRAM$$Length;
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#define PLC_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PLC_CODE_IN_PSRAM$$Base)
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#define PLC_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PLC_CODE_IN_PSRAM$$Base)
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#define PLC_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PLC_CODE_IN_PSRAM$$Length)
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#elif defined(CRANELG_4MRAM4MFLASH_SINGLE_SIM_SMS)|| defined(LTEGSM_THIN) //quectel pony add ltegsm_thin for ims fota
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extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PSB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Length;
|
|
#define PSB_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Base)
|
|
#define PSB_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSB_CODE_IN_PSRAM$$Base)
|
|
#define PSB_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Length)
|
|
|
|
#elif defined(SUPPORT_VOLTE_4MPSRAM4MFLASH)
|
|
extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PSB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Length;
|
|
#define PSB_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Base)
|
|
#define PSB_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSB_CODE_IN_PSRAM$$Base)
|
|
#define PSB_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Length)
|
|
|
|
extern UINT32 Image$$PSC_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PSC_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PSC_CODE_IN_PSRAM$$Length;
|
|
#define PSC_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSC_CODE_IN_PSRAM$$Base)
|
|
#define PSC_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSC_CODE_IN_PSRAM$$Base)
|
|
#define PSC_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSC_CODE_IN_PSRAM$$Length)
|
|
|
|
extern UINT32 Image$$PSD_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PSD_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PSD_CODE_IN_PSRAM$$Length;
|
|
#define PSD_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSD_CODE_IN_PSRAM$$Base)
|
|
#define PSD_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSD_CODE_IN_PSRAM$$Base)
|
|
#define PSD_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSD_CODE_IN_PSRAM$$Length)
|
|
|
|
extern UINT32 Image$$PSE_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PSE_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PSE_CODE_IN_PSRAM$$Length;
|
|
#define PSE_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSE_CODE_IN_PSRAM$$Base)
|
|
#define PSE_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSE_CODE_IN_PSRAM$$Base)
|
|
#define PSE_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSE_CODE_IN_PSRAM$$Length)
|
|
|
|
#else
|
|
#if !defined(LZOP_SUPPORT) && !defined(LTEONLY_8M8M) && !defined(CRANEL_4MRAM)
|
|
|
|
extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PSB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Length;
|
|
#define PSB_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Base)
|
|
#define PSB_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSB_CODE_IN_PSRAM$$Base)
|
|
#define PSB_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Length)
|
|
|
|
extern UINT32 Image$$PL_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PL_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PL_CODE_IN_PSRAM$$Length;
|
|
#define PL_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PL_CODE_IN_PSRAM$$Base)
|
|
#define PL_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PL_CODE_IN_PSRAM$$Base)
|
|
#define PL_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PL_CODE_IN_PSRAM$$Length)
|
|
|
|
|
|
extern UINT32 Image$$NON_OTA_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$NON_OTA_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$NON_OTA_CODE_IN_PSRAM$$Length;
|
|
#define NON_OTA_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$NON_OTA_CODE_IN_PSRAM$$Base)
|
|
#define NON_OTA_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$NON_OTA_CODE_IN_PSRAM$$Base)
|
|
#define NON_OTA_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$NON_OTA_CODE_IN_PSRAM$$Length)
|
|
#endif
|
|
#endif
|
|
#endif
|
|
|
|
#endif
|
|
//xiaoke@20190303
|
|
|
|
#if (defined(CRANEM_SS_16MRAM) && defined(LTEGSM_THIN))
|
|
extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PSB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PSB_CODE_IN_PSRAM$$Length;
|
|
#define PSB_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Base)
|
|
#define PSB_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSB_CODE_IN_PSRAM$$Base)
|
|
#define PSB_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSB_CODE_IN_PSRAM$$Length)
|
|
|
|
extern UINT32 Image$$PSC_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PSC_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PSC_CODE_IN_PSRAM$$Length;
|
|
#define PSC_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PSC_CODE_IN_PSRAM$$Base)
|
|
#define PSC_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PSC_CODE_IN_PSRAM$$Base)
|
|
#define PSC_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PSC_CODE_IN_PSRAM$$Length)
|
|
|
|
|
|
extern UINT32 Image$$PL_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PL_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PL_CODE_IN_PSRAM$$Length;
|
|
#define PL_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PL_CODE_IN_PSRAM$$Base)
|
|
#define PL_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PL_CODE_IN_PSRAM$$Base)
|
|
#define PL_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PL_CODE_IN_PSRAM$$Length)
|
|
|
|
extern UINT32 Image$$PLB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Load$$PLB_CODE_IN_PSRAM$$Base;
|
|
extern UINT32 Image$$PLB_CODE_IN_PSRAM$$Length;
|
|
#define PLB_CODE_IN_PSRAM_IMAGE_ADDR (UINT32)(&Image$$PLB_CODE_IN_PSRAM$$Base)
|
|
#define PLB_CODE_IN_PSRAM_LOAD_ADDR (UINT32)(&Load$$PLB_CODE_IN_PSRAM$$Base)
|
|
#define PLB_CODE_IN_PSRAM_LENGTH (UINT32)(&Image$$PLB_CODE_IN_PSRAM$$Length)
|
|
#endif
|
|
|
|
#define LT_COPY_RW_AREA_ADDR (UINT32)(&loadTableRWcopy)
|
|
#define LT_EE_POSTMORTEM_ADDR (UINT32)(&EE_PostmortemDesc)
|
|
#define LT_SHARED_FREE_BEGIN 0 //(UINT32)(&Image$$DDR_NONCACHE_REGION_AC_SHARE$$Base)
|
|
#define LT_SHARED_FREE_END 0 //(UINT32)(&Image$$DDR_NONCACHE_REGION_AC_SHARE_ENDMARKER$$Base)
|
|
|
|
#ifndef SS_FEATURE
|
|
#define LT_RAW_RW_BEGIN (UINT32)(&Image$$DDR_RW_DATA$$Base)
|
|
#define LT_RAW_RW_END (UINT32)(&Image$$DDR_DDR_PRIVATE_RW_AREA_ENDMARK$$Base)
|
|
#else
|
|
#define LT_RAW_RW_BEGIN (UINT32)(&Image$$DDR_RO_INIT_CODE$$Base) // pxxiong, modify to dump more DDR memory
|
|
#define LT_RAW_RW_END (UINT32)(&Image$$MSA_IR_REGION$$Base) // pxxiong, modify to dump more DDR memory
|
|
#endif
|
|
|
|
|
|
#define LT_RDATA_RO_BEGIN (UINT32)(&Image$$DDR_RELIABLE_RO_AREA$$Base)
|
|
#define LT_RDATA_RO_END (UINT32)(&Image$$DDR_RELIABLE_RO_AREA_ENDMARK$$Base)
|
|
#if 0
|
|
#define LT_ACIPC_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_UL$$Base)
|
|
#define LT_ACIPC_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_DL_ENDMARKER$$Base)
|
|
#else
|
|
#define LT_ACIPC_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_END ((UINT32)INVALID_ADDRESS)
|
|
#endif
|
|
#define LT_CP_LOAD_ADDR (UINT32)(&Image$$DDR_RO_INIT_CODE$$Base)
|
|
|
|
#define LT_MSA_ADDR_BEGIN (UINT32)(&Image$$DDR_DSP_RO$$Base)
|
|
#define LT_MSA_ADDR_END (UINT32)(&Image$$DDR_DSP_RO_ENDMARK$$Base)
|
|
|
|
#define LT_ACIPC_PS_UL_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_PS_UL$$Base)
|
|
#define LT_ACIPC_PS_UL_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_PS_UL_ENDMARKER$$Base)
|
|
#define LT_ACIPC_PS_DL_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_PS_DL$$Base)
|
|
#define LT_ACIPC_PS_DL_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_PS_DL_ENDMARKER$$Base)//(UINT32)(LT_ACIPC_PS_DL_BEGIN+0x100000-4)
|
|
|
|
#if 0
|
|
#define LT_ACIPC_OTHER_UL_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_UL$$Base)
|
|
#define LT_ACIPC_OTHER_UL_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_UL_ENDMARKER$$Base)
|
|
#define LT_ACIPC_OTHER_DL_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_DL$$Base)
|
|
#define LT_ACIPC_OTHER_DL_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_DL_ENDMARKER$$Base)
|
|
#define LT_ACIPC_PS_KS_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_PS_KeySection$$Base)
|
|
#define LT_ACIPC_PS_KS_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_PS_KeySection_ENDMARKER$$Base)
|
|
#define LT_ACIPC_OTHER_KS_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_KeySection$$Base)
|
|
#define LT_ACIPC_OTHER_KS_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_OTHER_KeySection_ENDMARKER$$Base)
|
|
#define LT_ACIPC_DIAG_UL_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_UL$$Base)
|
|
#define LT_ACIPC_DIAG_UL_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_UL_ENDMARKER$$Base)
|
|
#define LT_ACIPC_DIAG_DL_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_DL$$Base)
|
|
#define LT_ACIPC_DIAG_DL_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_DL_ENDMARKER$$Base)
|
|
#define LT_ACIPC_DIAG_KS_BEGIN (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_KeySection$$Base)
|
|
#define LT_ACIPC_DIAG_KS_END (UINT32)(&Image$$DDR_NONCACHE_REGION_ACIPC_DIAG_KeySection_ENDMARKER$$Base)
|
|
#else
|
|
#define LT_ACIPC_OTHER_UL_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_OTHER_UL_END ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_OTHER_DL_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_OTHER_DL_END ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_PS_KS_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_PS_KS_END ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_OTHER_KS_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_OTHER_KS_END ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_DIAG_UL_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_DIAG_UL_END ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_DIAG_DL_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_DIAG_DL_END ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_DIAG_KS_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_ACIPC_DIAG_KS_END ((UINT32)INVALID_ADDRESS)
|
|
#endif
|
|
#define LT_MEMLOG_BEGIN ((UINT32)(&Image$$DDR_NONCACHE_REGION_MEMLOG$$Base))
|
|
#define LT_MEMLOG_END (LT_MEMLOG_BEGIN + 16 * 1024)
|
|
|
|
#if 0
|
|
#define LT_RFBIN_BEGIN ((UINT32)(&Image$$DDR_RFBIN_RO$$Base))
|
|
#define LT_RFBIN_END (LT_RFBIN_BEGIN + 256 * 1024)
|
|
#else
|
|
#define LT_RFBIN_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_RFBIN_END ((UINT32)INVALID_ADDRESS)
|
|
#endif
|
|
|
|
#if 0
|
|
#define LT_RFS_BEGIN ((UINT32)(&Image$$DDR_RFS_AREA$$Base))
|
|
#define LT_RFS_END ((UINT32)(&Image$$DDR_RFS_AREA_ENDMARK$$Base))
|
|
#else
|
|
#define LT_RFS_BEGIN ((UINT32)INVALID_ADDRESS)
|
|
#define LT_RFS_END ((UINT32)INVALID_ADDRESS)
|
|
#endif
|
|
|
|
#define LT_NVM_OTA_BEGIN ((UINT32)(&Image$$NVMBUF$$Base))
|
|
#define LT_NVM_OTA_END ((UINT32)(&Image$$NVMBUF$$Base)+0x8000-4)
|
|
|
|
#define LT_MEP_OTA_BEGIN ((UINT32)(&Image$$NVMBUF$$Base))
|
|
#define LT_MEP_OTA_END ((UINT32)(&Image$$NVMBUF$$Base)+0x8000-4)
|
|
|
|
|
|
#ifdef PHS_SW_TTC_CPONLY
|
|
#define DIAG_PTR2PTR_Q (UINT32)INVALID_ADDRESS
|
|
#define DIAG_PTR2PTR_REPORT (UINT32)INVALID_ADDRESS
|
|
#else
|
|
#define DIAG_PTR2PTR_Q (UINT32)(&_diagIntIfQPtrData)
|
|
#define DIAG_PTR2PTR_REPORT (UINT32)(&_diagIntIfReportsList)
|
|
#endif
|
|
|
|
|
|
#endif
|
|
//add for fota on psram use mmipool
|
|
|
|
#ifdef DLDATA_IN_PSRAM
|
|
extern unsigned char mmiPool[];
|
|
extern const unsigned int mmiPoolSize;
|
|
#define MMIPOOL_BEGIN ((UINT32)(&mmiPool))
|
|
#define MMIPOOL_SIZE_ADDR ((UINT32)(&mmiPoolSize))
|
|
#else
|
|
#define MMIPOOL_BEGIN ((UINT32)(INVALID_ADDRESS))
|
|
#define MMIPOOL_SIZE_ADDR ((UINT32)(INVALID_ADDRESS))
|
|
#endif
|
|
|
|
#ifdef CRANE_MCU_DONGLE
|
|
extern UINT32 Image$$DDR_RO_EXEC$$Base;
|
|
extern UINT32 Image$$DDR_RO_EXEC$$Length;
|
|
#define DDR_RO_EXEC_ADDR ((UINT32)(&Image$$DDR_RO_EXEC$$Base))
|
|
#define DDR_RO_EXEC_SIZE_ADDR ((UINT32)(&Image$$DDR_RO_EXEC$$Length))
|
|
#else
|
|
#define DDR_RO_EXEC_ADDR ((UINT32)(INVALID_ADDRESS))
|
|
#define DDR_RO_EXEC_SIZE_ADDR ((UINT32)(INVALID_ADDRESS))
|
|
#endif
|
|
const LoadTableType loadTable =
|
|
{
|
|
//++++++++++++++++++++++++++++++++++++++++++++++++++
|
|
//AREA_1: LOADTABLE_HEADER
|
|
{
|
|
{
|
|
(UINT32)LT_BRANCH_TO_ENTRY_OPCODE,
|
|
(UINT32)LT_ENTRY_POINT
|
|
}
|
|
},
|
|
//++++++++++++++++++++++++++++++++++++++++++++++++++
|
|
//AREA_2: VERSION & SIGNATURE
|
|
{
|
|
{
|
|
LT_ANTI_ROLLBACK_VER,
|
|
LT_EXECUTE_MODE,
|
|
LT_PS_MODE,
|
|
"IMAGE_GENERAL_INFO" // filled by external script
|
|
}
|
|
},
|
|
//++++++++++++++++++++++++++++++++++++++++++++++++++
|
|
//AREA_3: RW COMPRESS REGION SYMBOL
|
|
#if (defined(SINGLE_SIM) || defined(CRANELS_8MRAM4MFLASH_MULTI_LOADTABLE))
|
|
{
|
|
{
|
|
EXTERNAL_RW_REGION_PRE_STRING,'1',"DDR_RW_\0", DDR_RW_DATA_IMAGE_ADDR, DDR_RW_DATA_LOAD_ADDR, DDR_RW_DATA_LENGTH, (UINT32)0 //DDR_RW_DATA
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'2',"PS_NCAH\0", PS_NONCACHE_DATA_IMAGE_ADDR, PS_NONCACHE_DATA_LOAD_ADDR, PS_NONCACHE_DATA_LENGTH, (UINT32)0 //PS_NONCACHE_DATA
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'3',"ITCM \0", DDR_ITCM_BACKUP_ADDR, DDR_ITCM_LOAD_ADDR, DDR_ITCM_LENGTH, (UINT32)0 //DDR_ITCM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'4',"CODE_PS\0", PS_CODE_IN_PSRAM_IMAGE_ADDR, PS_CODE_IN_PSRAM_LOAD_ADDR, PS_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
#if (defined(LTEONLY_THIN_SINGLE_SIM_2MFLASH) || defined(CRANELS_8MRAM4MFLASH_MULTI_LOADTABLE))
|
|
#if (defined(QUECTEL_MINIFOTA_SUPPORT) || defined(QUEC_NOTA_EXT_FLASH_SUPPORT))//@20240511 修复BDA 2M项目外挂flash，开机无法运行问题
|
|
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'5',"CODEPSB\0", PSB_CODE_IN_PSRAM_IMAGE_ADDR, PSB_CODE_IN_PSRAM_LOAD_ADDR, PSB_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'6',"CODEPSC\0", PSC_CODE_IN_PSRAM_IMAGE_ADDR, PSC_CODE_IN_PSRAM_LOAD_ADDR, PSC_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'7',"CODEPSD\0", PSD_CODE_IN_PSRAM_IMAGE_ADDR, PSD_CODE_IN_PSRAM_LOAD_ADDR, PSD_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'8',"CODEPSE\0", PSE_CODE_IN_PSRAM_IMAGE_ADDR, PSE_CODE_IN_PSRAM_LOAD_ADDR, PSE_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'9',"CODEPSF\0", PSF_CODE_IN_PSRAM_IMAGE_ADDR, PSF_CODE_IN_PSRAM_LOAD_ADDR, PSF_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'A',"CODE_PL\0", PLA_CODE_IN_PSRAM_IMAGE_ADDR, PLA_CODE_IN_PSRAM_LOAD_ADDR, PLA_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PL_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'B',"CODEPLB\0", PLB_CODE_IN_PSRAM_IMAGE_ADDR, PLB_CODE_IN_PSRAM_LOAD_ADDR, PLB_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PL_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'C',"CODEPLC\0", PLC_CODE_IN_PSRAM_IMAGE_ADDR, PLC_CODE_IN_PSRAM_LOAD_ADDR, PLC_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PL_CODE_IN_PSRAM
|
|
#endif
|
|
|
|
#elif defined(SUPPORT_VOLTE_4MPSRAM4MFLASH)
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'5',"CODEPSB\0", PSB_CODE_IN_PSRAM_IMAGE_ADDR, PSB_CODE_IN_PSRAM_LOAD_ADDR, PSB_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'6',"CODEPSC\0", PSC_CODE_IN_PSRAM_IMAGE_ADDR, PSC_CODE_IN_PSRAM_LOAD_ADDR, PSC_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'7',"CODEPSD\0", PSD_CODE_IN_PSRAM_IMAGE_ADDR, PSD_CODE_IN_PSRAM_LOAD_ADDR, PSD_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'8',"CODEPSE\0", PSE_CODE_IN_PSRAM_IMAGE_ADDR, PSE_CODE_IN_PSRAM_LOAD_ADDR, PSE_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
#elif (defined(CRANEM_SS_16MRAM) && defined(LTEGSM_THIN))
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'5',"CODEPSB\0", PSB_CODE_IN_PSRAM_IMAGE_ADDR, PSB_CODE_IN_PSRAM_LOAD_ADDR, PSB_CODE_IN_PSRAM_LENGTH, (UINT32)0 //AP_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'6',"CODEPSC\0", PSC_CODE_IN_PSRAM_IMAGE_ADDR, PSC_CODE_IN_PSRAM_LOAD_ADDR, PSC_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'7',"CODE_PL\0", PL_CODE_IN_PSRAM_IMAGE_ADDR, PL_CODE_IN_PSRAM_LOAD_ADDR, PL_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PL_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'8',"CODEPLB\0", PLB_CODE_IN_PSRAM_IMAGE_ADDR, PLB_CODE_IN_PSRAM_LOAD_ADDR, PLB_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PL_CODE_IN_PSRAM
|
|
#elif defined(CRANELG_4MRAM4MFLASH_SINGLE_SIM_SMS) || defined(LTEGSM_THIN) //quectel pony add ltegsm_thin for ims fota
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'5',"CODEPSB\0", PSB_CODE_IN_PSRAM_IMAGE_ADDR, PSB_CODE_IN_PSRAM_LOAD_ADDR, PSB_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
#endif
|
|
}
|
|
},
|
|
#else
|
|
{
|
|
{
|
|
EXTERNAL_RW_REGION_PRE_STRING,'1',"DDR_RW_\0", DDR_RW_DATA_IMAGE_ADDR, DDR_RW_DATA_LOAD_ADDR, DDR_RW_DATA_LENGTH, (UINT32)0 //DDR_RW_DATA
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'2',"PS_NCAH\0", PS_NONCACHE_DATA_IMAGE_ADDR, PS_NONCACHE_DATA_LOAD_ADDR, PS_NONCACHE_DATA_LENGTH, (UINT32)0 //PS_NONCACHE_DATA
|
|
#if (defined(CRANEL_4MRAM) || defined(CRANEL_8MRAM) || defined(LTEGSM_THIN))
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'3',"ITCM\0", DDR_ITCM_BACKUP_ADDR, DDR_ITCM_LOAD_ADDR, DDR_ITCM_LENGTH, (UINT32)0 //DDR_ITCM
|
|
#else
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'3',"USBNCAH\0", DDR_NONCACHE_USB_IMAGE_ADDR, DDR_NONCACHE_USB_LOAD_ADDR, DDR_NONCACHE_USB_LENGTH, (UINT32)0 //DDR_NONCACHE_USB
|
|
#endif
|
|
#ifdef RUN_XIP_MODE
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'4',"CODE_PS\0", PS_CODE_IN_PSRAM_IMAGE_ADDR, PS_CODE_IN_PSRAM_LOAD_ADDR, PS_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PS_CODE_IN_PSRAM
|
|
#endif
|
|
#ifdef CRANE_MCU_DONGLE
|
|
#if (!defined(LZOP_SUPPORT) && !defined(LTEONLY_8M8M) && !defined(CRANEL_4MRAM) && !defined(LTEGSM_THIN))
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'5',"CODEPSB\0", PSB_CODE_IN_PSRAM_IMAGE_ADDR, PSB_CODE_IN_PSRAM_LOAD_ADDR, PSB_CODE_IN_PSRAM_LENGTH, (UINT32)0 //AP_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'6',"CODE_PL\0", PL_CODE_IN_PSRAM_IMAGE_ADDR, PL_CODE_IN_PSRAM_LOAD_ADDR, PL_CODE_IN_PSRAM_LENGTH, (UINT32)0 //PL_CODE_IN_PSRAM
|
|
,EXTERNAL_RW_REGION_PRE_STRING,'7',"NON_OTA\0", NON_OTA_CODE_IN_PSRAM_IMAGE_ADDR, NON_OTA_CODE_IN_PSRAM_LOAD_ADDR, NON_OTA_CODE_IN_PSRAM_LENGTH, (UINT32)0 //DDR_NONCACHE_USB
|
|
|
|
#endif
|
|
#endif
|
|
}
|
|
},
|
|
#endif
|
|
//++++++++++++++++++++++++++++++++++++++++++++++++++
|
|
//AREA_4: ARMLINKE SYMBOL LIST
|
|
{
|
|
{
|
|
//cp.bin
|
|
{"CP_EXEC\0", (UINT32)(&Image$$DDR_RO_INIT_CODE$$Base)}, // "CP_EXEC" bind with /tavor/Arbel/build/external_rw_region_compress.pl base address detect. should not change.
|
|
{"CP_LOAD\0", (UINT32)(INVALID_ADDRESS)},
|
|
{"IMG_END\0", LT_IMAGE_END},
|
|
{"BIN_SIZE\0", (UINT32)(INVALID_ADDRESS)}, //filled by external perl script after image build
|
|
//dsp.bin
|
|
{"DSP_BEGIN\0", (UINT32)(&Image$$DDR_DSP_RO$$Base)},
|
|
{"DSP_END\0", (UINT32)(&Image$$DDR_DSP_RO_ENDMARK$$Base)},
|
|
//rf.bin
|
|
{"RF_ADDR_Z2\0", LT_RF_LOAD_ADDR_Z2}, //RF.bin psram load address for Z2
|
|
{"RF_ADDR_A0\0", LT_RF_LOAD_ADDR_A0}, //RF.bin psram load address for A0
|
|
//rd.bin
|
|
{"RD_BEGIN\0", (UINT32)(RD_START)},
|
|
{"RD_END\0", (UINT32)(RD_START + RD_PSIZE)},
|
|
//apn.bin
|
|
{"APN_BEGIN\0", (UINT32)(APN_START)},
|
|
{"APN_END\0", (UINT32)(APN_START + APN_PSIZE)},
|
|
//fota_param
|
|
{"FOTA_PRM_S\0", (UINT32)(INVALID_ADDRESS)},
|
|
{"FOTA_PRM_E\0", (UINT32)(INVALID_ADDRESS)},
|
|
//updater
|
|
{"UPDATER_S\0", (UINT32)(INVALID_ADDRESS)},
|
|
{"UPDATER_E\0", (UINT32)(INVALID_ADDRESS)},
|
|
//fota_pkg
|
|
{"FOTA_PKG_S\0", (UINT32)(INVALID_ADDRESS)},
|
|
{"FOTA_PKG_E\0", (UINT32)(INVALID_ADDRESS)},
|
|
//nvm
|
|
{"NVM_BEGIN\0", (UINT32)(INVALID_ADDRESS)},
|
|
{"NVM_END\0", (UINT32)(INVALID_ADDRESS)},
|
|
//factory_a
|
|
{"F_A_START\0", (UINT32)(FLASH_TRAIL - FACTORY_PSIZE*2)},
|
|
{"F_A_END\0", (UINT32)(FLASH_TRAIL - FACTORY_PSIZE)},
|
|
#if (defined(CRANEL_4MRAM) || defined(CRANEL_8MRAM) || defined(LTEGSM_THIN))
|
|
{"OTA_MT\0", (UINT32)(OTA_MT)},
|
|
{"F_B_END\0", (UINT32)(FLASH_TRAIL)},
|
|
#else
|
|
//factory_b
|
|
{"F_B_START\0", (UINT32)(FLASH_TRAIL - FACTORY_PSIZE)},
|
|
{"F_B_END\0", (UINT32)(FLASH_TRAIL)},
|
|
#endif
|
|
#ifdef CRANE_MCU_DONGLE
|
|
//DDR_RO_EXEC
|
|
{"DDR_RO_ADD\0", (UINT32)(DDR_RO_EXEC_ADDR)},
|
|
{"DDR_RO_LEN\0", (UINT32)(DDR_RO_EXEC_SIZE_ADDR)},
|
|
#else
|
|
//MMIPOOL
|
|
{"MMIPOOL_BG\0", (UINT32)(MMIPOOL_BEGIN)},
|
|
{"MMIPOOL_SZ\0", (UINT32)(MMIPOOL_SIZE_ADDR)},
|
|
#endif
|
|
|
|
#if (defined(CRANEL_4MRAM) || defined(CRANEL_8MRAM))
|
|
#if defined(SINGLE_SIM)
|
|
#if (defined(CRANEL_AUDIOE_DSP))
|
|
//for dsp audio optimized baseon reduce sulog irbuf
|
|
//for 760K ddr DSP
|
|
{"HEAP_GU_BG\0", DDR_HEAP_GUARD_ADDR},
|
|
{"RF_BACKUP\0", DDR_NONCACHE_RF_BK_ADDR},
|
|
{"DSPBK_SIZE\0", CRANEL_AUDIOE_DSP_SIZE},
|
|
#elif defined(REDUCE_SULOG_IRBUF_DSP)
|
|
//for reduce sulog irbuf dsp
|
|
//for 292K DSP
|
|
{"HEAP_GU_BG\0", DDR_HEAP_GUARD_ADDR},
|
|
{"RF_BACKUP\0", DDR_NONCACHE_RF_BK_ADDR},
|
|
#if ((defined(CRANELR_SUPPORT) && defined(L1_WIFI_LOCATION)) || defined(CRANELG_SUPPORT) || defined(CRANELRH_SUPPORT))
|
|
{"DSPBK_SIZE\0", 0x0003E000+0x00002800},//craneLR reduce sulog irbuf DSP,support WIFI scan,DSP size 258K
|
|
#elif (defined(CRANELR_SUPPORT) || defined(CRANELS_SUPPORT))
|
|
{"DSPBK_SIZE\0", 0x0003E000},////craneLR and craneLS reduce sulog irbuf DSP,craneLR not support WIFI scan,DSP size 248K
|
|
#else
|
|
{"DSPBK_SIZE\0", 0x0004C000},//craneL reduce sulog irbuf DSP,DSP size 248K,but have ITCM header,total 304KB
|
|
#endif
|
|
#elif !defined(NOT_REDUCE_SULOG_DSP)
|
|
//for reduce sulog dsp
|
|
//for 328K DSP
|
|
{"HEAP_GU_BG\0", DDR_HEAP_GUARD_ADDR},
|
|
{"RF_BACKUP\0", DDR_NONCACHE_RF_BK_ADDR},
|
|
{"DSPBK_SIZE\0", 0x00052000},//dsp size 328K
|
|
#else
|
|
//for 448K DSP
|
|
{"HEAP_GU_BG\0", DDR_HEAP_GUARD_ADDR},
|
|
{"RF_BACKUP\0", DDR_HEAP_GUARD_END_ADDR},
|
|
{"DSPBK_SIZE\0", 0x00070000},//dsp size 448K
|
|
#endif
|
|
|
|
#else
|
|
#if (defined(CRANEL_AUDIOE_DSP))
|
|
//for dsp audio optimized baseon reduce sulog irbuf
|
|
//for 760K ddr DSP
|
|
{"HEAP_GU_BG\0", 0x7E0E0000},
|
|
{"RF_BACKUP\0", DDR_NONCACHE_RF_BK_ADDR},
|
|
{"DSPBK_SIZE\0", CRANEL_AUDIOE_DSP_SIZE},
|
|
#elif defined(REDUCE_SULOG_IRBUF_DSP)
|
|
#if defined(CRANELS_SUPPORT)
|
|
//for 248K DSP
|
|
{"HEAP_GU_BG\0", 0x7E0E0000},//0x7E0E0000 is logo.bin end address
|
|
{"RF_BACKUP\0", DDR_NONCACHE_RF_BK_ADDR},
|
|
{"DSPBK_SIZE\0", 0x0003E000},//dsp size 248K
|
|
#else
|
|
//for 304K DSP
|
|
{"HEAP_GU_BG\0", 0x7E0E0000},//0x7E0E0000 is logo.bin end address
|
|
{"RF_BACKUP\0", DDR_NONCACHE_PS_DL_LOAD_ADDR},
|
|
{"DSPBK_SIZE\0", 0x0004C000},//dsp size 304K
|
|
#endif
|
|
#else
|
|
//for 448K DSP
|
|
{"HEAP_GU_BG\0", 0x7E0E0000},//0x7E0E0000 is logo.bin end address
|
|
{"HEAP_GU_ED\0", DDR_HEAP_GUARD_END_ADDR},
|
|
{"DSPBK_SIZE\0", 0x00070000},//dsp size 448K
|
|
#endif
|
|
#endif
|
|
#else
|
|
#if defined(LTEGSM_THIN)
|
|
//for 2.25M DSP, yqian
|
|
{"HEAP_GU_BG\0", DDR_HEAP_GUARD_ADDR},
|
|
{"RF_BACKUP\0", DDR_NONCACHE_RF_BK_ADDR},
|
|
{"DSPBK_SIZE\0", 0x100000},
|
|
#else
|
|
//for 2.25M DSP, yqian
|
|
{"HEAP_GU_BG\0", DDR_HEAP_GUARD_ADDR},
|
|
{"HEAP_GU_ED\0", DDR_HEAP_GUARD_END_ADDR},
|
|
{"DSPBK_SIZE\0", 0x100000},
|
|
#endif
|
|
#endif
|
|
|
|
|
|
}
|
|
},
|
|
//++++++++++++++++++++++++++++++++++++++++++++++++++
|
|
//AREA_5: FUNCTIONAL VAL
|
|
{
|
|
{
|
|
{"VERGIN\0", 0xFFFFFFFF}, //vergin by default , boot33 may update this field.
|
|
{"BOOTCOUNT\0", 0xFFFFFFFF}, //disable auto bootcount++ to avoid boot33 qspi erase & write.
|
|
{"UART_PRT\0", 1}, //uart_print_enable by default, boot33 may update this field.
|
|
{"FATAL_PRT\0", 1}, //fatal_print_enable by default, boot33 may update this field.
|
|
{"DEF_FREQ\0", 0xFFFFFFFF}, //default freq. TODO:further porting
|
|
{"CORE_VOL\0", 0xFFFFFFFF}, //default host voltage. TODO: further porting
|
|
}
|
|
}
|
|
};
|
|
|
|
LoadTableType *pLoadTable = (LoadTableType*)INVALID_ADDRESS;
|
|
|
|
|
|
UINT32 get_mmipool_start_address(void)
|
|
{
|
|
#ifdef CRANE_MCU_DONGLE
|
|
return 0;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.mmipool_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_mmipool_end_address(void)
|
|
{
|
|
#ifdef CRANE_MCU_DONGLE
|
|
return 0;
|
|
#else
|
|
return (UINT32)( pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.mmipool_start_address.value
|
|
+ (UINT32)(*(UINT32 *)(pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.mmipool_size_address.value)));
|
|
#endif
|
|
}
|
|
|
|
BOOL is_partition_internal_flash(const char *name){
|
|
|
|
_ptflash tmp = ptable_get_flash_type(name);
|
|
|
|
return (tmp == pt_flash_internal);
|
|
}
|
|
|
|
UINT32 get_nvm_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * nvm_start_Entry= ptable_find_entry("nvm");
|
|
|
|
if(is_partition_internal_flash("nvm"))
|
|
return nvm_start_Entry->start; /* 3601s internal spi nor flash */
|
|
else
|
|
return nvm_start_Entry->vstart; /* 3601 or external */
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_nvm_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * nvm_end_Entry= ptable_find_entry("nvm");
|
|
|
|
if(is_partition_internal_flash("nvm"))
|
|
return nvm_end_Entry->start+nvm_end_Entry->size;
|
|
else
|
|
return nvm_end_Entry->vstart+nvm_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_end_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_nvm_bin_size(void)
|
|
{
|
|
_ptentry * nvm_begin_Entry= ptable_find_entry("nvm");
|
|
return nvm_begin_Entry->vsize;
|
|
}
|
|
#ifdef QUEC_NVM_IN_EXT_FLASH
|
|
UINT32 get_cust_nvm_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * nvm_start_Entry= ptable_find_entry("cust_nvm");
|
|
|
|
if(is_partition_internal_flash("cust_nvm"))
|
|
return nvm_start_Entry->start;
|
|
else
|
|
return nvm_start_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_cust_nvm_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * nvm_end_Entry= ptable_find_entry("cust_nvm");
|
|
|
|
if(is_partition_internal_flash("cust_nvm"))
|
|
return nvm_end_Entry->start+nvm_end_Entry->size;
|
|
else
|
|
return nvm_end_Entry->vstart+nvm_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_end_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_cust_nvm_bin_size(void)
|
|
{
|
|
_ptentry * nvm_begin_Entry= ptable_find_entry("cust_nvm");
|
|
return nvm_begin_Entry->vsize;
|
|
}
|
|
#endif
|
|
UINT32 get_rd_begin_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * rd_begin_Entry= ptable_find_entry("rd");
|
|
return rd_begin_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.rd_begin_addr.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_rd_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * rd_end_Entry= ptable_find_entry("rd");
|
|
return rd_end_Entry->vstart+rd_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.rd_end_addr.value;
|
|
#endif
|
|
}
|
|
|
|
// BT_SUPPORT
|
|
UINT32 get_btbin_begin_address(void)
|
|
{
|
|
_ptentry * btbin_begin_Entry = ptable_find_entry("btbin");
|
|
return btbin_begin_Entry->vstart;
|
|
}
|
|
|
|
UINT32 get_btbin_end_address(void)
|
|
{
|
|
_ptentry * btbin_end_Entry = ptable_find_entry("btbin");
|
|
return btbin_end_Entry->vstart + btbin_end_Entry->size;
|
|
}
|
|
|
|
UINT32 get_btbin_bin_size(void)
|
|
{
|
|
_ptentry * btbin_begin_Entry = ptable_find_entry("btbin");
|
|
return btbin_begin_Entry->vsize;
|
|
}
|
|
|
|
UINT32 get_btlst_begin_address(void)
|
|
{
|
|
_ptentry * btlst_begin_Entry = ptable_find_entry("btlst");
|
|
return btlst_begin_Entry->vstart;
|
|
}
|
|
|
|
UINT32 get_btlst_end_address(void)
|
|
{
|
|
_ptentry * btlst_end_Entry = ptable_find_entry("btlst");
|
|
return btlst_end_Entry->vstart + btlst_end_Entry->size;
|
|
}
|
|
|
|
UINT32 get_btlst_bin_size(void)
|
|
{
|
|
_ptentry * btlst_begin_Entry = ptable_find_entry("btlst");
|
|
return btlst_begin_Entry->vsize;
|
|
}
|
|
|
|
UINT32 get_apn_begin_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * apn_begin_Entry= ptable_find_entry("apn");
|
|
if (apn_begin_Entry)
|
|
return apn_begin_Entry->vstart;
|
|
else
|
|
return 0;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.apn_begin_addr.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_apn_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * apn_end_Entry= ptable_find_entry("apn");
|
|
if (apn_end_Entry)
|
|
return apn_end_Entry->vstart+apn_end_Entry->size;
|
|
else
|
|
return 0;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.apn_end_addr.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_apn_bin_size(void)
|
|
{
|
|
_ptentry * apn_begin_Entry= ptable_find_entry("apn");
|
|
if (apn_begin_Entry)
|
|
return apn_begin_Entry->vsize;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
UINT32 get_apn_ex_begin_address(void)
|
|
{
|
|
_ptentry * apn_begin_Entry= ptable_find_entry("apn_ex");
|
|
if (apn_begin_Entry)
|
|
return apn_begin_Entry->vstart;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
UINT32 get_apn_ex_end_address(void)
|
|
{
|
|
_ptentry * apn_end_Entry= ptable_find_entry("apn_ex");
|
|
if (apn_end_Entry)
|
|
return apn_end_Entry->vstart+apn_end_Entry->size;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
UINT32 get_apn_ex_bin_size(void)
|
|
{
|
|
_ptentry * apn_begin_Entry= ptable_find_entry("apn_ex");
|
|
if (apn_begin_Entry)
|
|
return apn_begin_Entry->vsize;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
UINT32 get_legabin_begin_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * legabin_begin_Entry= ptable_find_entry("legabin");
|
|
return legabin_begin_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.legabin_begin_addr.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_legabin_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * legabin_end_Entry= ptable_find_entry("legabin");
|
|
return legabin_end_Entry->vstart+legabin_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.legabin_end_addr.value;
|
|
#endif
|
|
}
|
|
|
|
|
|
UINT32 get_factory_a_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * factory_a_begin_Entry= ptable_find_entry("factory_a");
|
|
return factory_a_begin_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.factory_a_start_address.value;
|
|
#endif
|
|
|
|
}
|
|
|
|
UINT32 get_factory_a_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * factory_a_end_Entry= ptable_find_entry("factory_a");
|
|
return factory_a_end_Entry->vstart+factory_a_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.factory_a_end_address.value;
|
|
#endif
|
|
|
|
}
|
|
|
|
UINT32 get_factory_b_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * factory_b_begin_Entry= ptable_find_entry("factory_b");
|
|
return factory_b_begin_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.factory_b_start_address.value;
|
|
#endif
|
|
|
|
}
|
|
UINT32 get_factory_a_bin_size(void)
|
|
{
|
|
_ptentry * factory_a_begin_Entry= ptable_find_entry("factory_a");
|
|
return factory_a_begin_Entry->vsize;
|
|
}
|
|
|
|
|
|
UINT32 get_factory_b_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * factory_b_end_Entry= ptable_find_entry("factory_b");
|
|
return factory_b_end_Entry->vstart+factory_b_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.factory_b_end_address.value;
|
|
#endif
|
|
|
|
}
|
|
|
|
UINT32 get_fota_param_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * fota_param_begin_Entry= ptable_find_entry("fota_param");
|
|
return fota_param_begin_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.fota_param_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_fota_param_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * fota_param_end_Entry= ptable_find_entry("fota_param");
|
|
return fota_param_end_Entry->vstart+fota_param_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.fota_param_end_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_fota_pkg_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * fota_pkg_begin_Entry= ptable_find_entry("fota_pkg");
|
|
return fota_pkg_begin_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.fota_pkg_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_fota_pkg_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * fota_pkg_end_Entry= ptable_find_entry("fota_pkg");
|
|
return fota_pkg_end_Entry->vstart+fota_pkg_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.fota_param_end_address.value;
|
|
#endif
|
|
}
|
|
UINT32 get_system_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * fota_pkg_begin_Entry= ptable_find_entry("system");
|
|
return fota_pkg_begin_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.fota_pkg_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_system_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * fota_pkg_end_Entry= ptable_find_entry("system");
|
|
return fota_pkg_end_Entry->vstart+fota_pkg_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.fota_param_end_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_updater_start_address(void)
|
|
{
|
|
_ptentry * fota_pkg_begin_Entry= ptable_find_entry("updater");
|
|
if(fota_pkg_begin_Entry)
|
|
return fota_pkg_begin_Entry->vstart;
|
|
else
|
|
return NULL;
|
|
}
|
|
|
|
UINT32 get_updater_end_address(void)
|
|
{
|
|
_ptentry * fota_pkg_end_Entry= ptable_find_entry("updater");
|
|
if(fota_pkg_end_Entry)
|
|
return fota_pkg_end_Entry->vstart + fota_pkg_end_Entry->size;
|
|
else
|
|
return NULL;
|
|
}
|
|
|
|
|
|
UINT32 get_updater_backup_start_address(void)
|
|
{
|
|
_ptentry * fota_pkg_begin_Entry= ptable_find_entry("updater_bak");
|
|
if(fota_pkg_begin_Entry)
|
|
return fota_pkg_begin_Entry->vstart;
|
|
else
|
|
return NULL;
|
|
}
|
|
|
|
UINT32 get_updater_backup_end_address(void)
|
|
{
|
|
_ptentry * fota_pkg_end_Entry= ptable_find_entry("updater_bak");
|
|
if(fota_pkg_end_Entry)
|
|
return fota_pkg_end_Entry->vstart + fota_pkg_end_Entry->size;
|
|
else
|
|
return NULL;
|
|
}
|
|
|
|
UINT32 get_updater_copy_size(void)
|
|
{
|
|
_ptentry * fota_pkg_Entry= ptable_find_entry("updater");
|
|
if(fota_pkg_Entry)
|
|
return fota_pkg_Entry->size;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
|
|
UINT32 get_cp_binary_size(void){
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.binary_size.value;
|
|
}
|
|
|
|
UINT32 get_dsp_copy_size(void)
|
|
{
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.dsp_end_addr.value - pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.dsp_begin_addr.value + 0x04;
|
|
}
|
|
|
|
UINT32 get_ddr_heap_size(void)
|
|
{
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.ddr_heap_guard_end_addr.value - pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.ddr_heap_guard_begin_addr.value + 0x04;
|
|
}
|
|
|
|
UINT32 get_dsp_backup_addr(void)
|
|
{
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.ddr_heap_guard_begin_addr.value;
|
|
}
|
|
|
|
UINT32 get_dsp_backup_size(void)
|
|
{
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.dsp_bk_size.value;
|
|
}
|
|
|
|
|
|
|
|
UINT32 get_dsp_start_address(void)
|
|
{
|
|
_ptentry * dsp_begin_Entry= ptable_find_entry("dsp");
|
|
|
|
if(is_partition_internal_flash("dsp"))
|
|
return dsp_begin_Entry->start; /* 3601s internal spi nor flash */
|
|
else
|
|
return dsp_begin_Entry->vstart; /* 3601 or external */
|
|
}
|
|
|
|
UINT32 get_dsp_partition_size(void)
|
|
{
|
|
_ptentry * dsp_begin_Entry= ptable_find_entry("dsp");
|
|
return dsp_begin_Entry->size;
|
|
}
|
|
|
|
UINT32 get_dsp_bin_size(void)
|
|
{
|
|
_ptentry * dsp_begin_Entry= ptable_find_entry("dsp");
|
|
return dsp_begin_Entry->vsize;
|
|
}
|
|
|
|
UINT32 get_rf_start_address(void)
|
|
{
|
|
_ptentry * rf_begin_Entry= ptable_find_entry("rfbin");
|
|
|
|
if(is_partition_internal_flash("rfbin"))
|
|
return rf_begin_Entry->start; /* 3601s internal spi nor flash */
|
|
else
|
|
return rf_begin_Entry->vstart; /* 3601 or external */
|
|
}
|
|
|
|
UINT32 get_rf_partition_size(void)
|
|
{
|
|
_ptentry * rf_begin_Entry= ptable_find_entry("rfbin");
|
|
return rf_begin_Entry->size;
|
|
}
|
|
|
|
UINT32 get_rf_bin_size(void)
|
|
{
|
|
_ptentry * rf_begin_Entry= ptable_find_entry("rfbin");
|
|
return rf_begin_Entry->vsize;
|
|
}
|
|
|
|
#ifdef OPENCPU_SUPPORT
|
|
UINT32 get_app_begin_address(void)
|
|
{
|
|
_ptentry * apn_begin_Entry= ptable_find_entry("app");
|
|
return apn_begin_Entry->vstart;
|
|
}
|
|
|
|
UINT32 get_app_end_address(void)
|
|
{
|
|
_ptentry * apn_end_Entry= ptable_find_entry("app");
|
|
return apn_end_Entry->vstart+apn_end_Entry->size;
|
|
}
|
|
|
|
UINT32 get_app_bin_size(void)
|
|
{
|
|
_ptentry * apn_begin_Entry= ptable_find_entry("app");
|
|
return apn_begin_Entry->vsize;
|
|
}
|
|
|
|
UINT32 get_app_load_addr(void)
|
|
{
|
|
return DDR_APP_IMAGE_BASE_ADDR;
|
|
}
|
|
|
|
UINT32 get_app_area_length(void)
|
|
{
|
|
return (DDR_APP_IMAGE_END_ADDR - DDR_APP_IMAGE_BASE_ADDR);
|
|
}
|
|
#endif
|
|
|
|
//xiaokeweng@20191008 flash cache_line auto config
|
|
//for partition table , the XIP code part should be cacheable
|
|
//but the NVM/factory/fota_pkg should always be noncache ,
|
|
//so implement solution to detect the cache_line address
|
|
//aligned inside [dsp_start_addr ~ reserved_end_addr] for C-code MPU audo reconfig
|
|
//
|
|
UINT32 get_dsp_start_address_offset(void)
|
|
{
|
|
_ptentry * dsp_begin_Entry= ptable_find_entry("dsp");
|
|
return dsp_begin_Entry->start;//Entry->start addr as expection
|
|
}
|
|
|
|
|
|
UINT32 get_reserved_start_address(void)
|
|
{
|
|
_ptentry * reserved_end_Entry= ptable_find_entry("reserved");
|
|
return reserved_end_Entry->vstart;
|
|
|
|
}
|
|
|
|
UINT32 get_reserved_end_address(void)
|
|
{
|
|
_ptentry * reserved_end_Entry= ptable_find_entry("reserved");
|
|
return reserved_end_Entry->vstart + reserved_end_Entry->vsize;
|
|
|
|
}
|
|
|
|
|
|
UINT32 get_reserved_end_address_offset(void)
|
|
{
|
|
#if 1
|
|
_ptentry * reserved_end_Entry= ptable_find_entry("reserved");
|
|
return reserved_end_Entry->start+reserved_end_Entry->size;
|
|
#else
|
|
ASSERT(0);
|
|
#endif
|
|
}
|
|
#ifdef QUECTEL_PROJECT_CUST
|
|
|
|
unsigned int get_bootloader_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * bootloader_end_Entry= ptable_find_entry("bootloader");
|
|
return bootloader_end_Entry->vstart + bootloader_end_Entry->vsize;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.factory_b_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
#ifdef QUECTEL_OPEN_CPU
|
|
UINT32 get_flash_cache_end_address_offset(void)
|
|
{
|
|
_ptentry * reserved_end_Entry= ptable_find_entry("customer_app");
|
|
if((reserved_end_Entry == NULL)||((unsigned int)reserved_end_Entry->vstart >= 0x90000000))/*���customer_app���������flash�ͷ���reserve��ַ*/
|
|
{
|
|
reserved_end_Entry= ptable_find_entry("reserved");
|
|
if(reserved_end_Entry == NULL)
|
|
ASSERT(0);
|
|
}
|
|
return reserved_end_Entry->start+reserved_end_Entry->size;
|
|
}
|
|
#endif
|
|
|
|
UINT32 get_rf_load_addr(void)
|
|
{
|
|
UINT32 rf_load_addr;
|
|
|
|
rf_load_addr = pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.rf_load_addr_a0.value;
|
|
|
|
return rf_load_addr;
|
|
}
|
|
|
|
|
|
|
|
|
|
UINT32 getCommImageBaseAddr(void)
|
|
{
|
|
#if 1 //LOADTABLE_REFACTOR@xiaokeweng_20190423
|
|
return(LT_IMAGE_BEGIN);
|
|
#endif //LOADTABLE_REFACTOR@xiaokeweng_20190423
|
|
}
|
|
|
|
void getAppComShareMemAddr(UINT32* begin, UINT32* end)
|
|
{
|
|
#if 1 //LOADTABLE_REFACTOR@xiaokeweng_20190423
|
|
*begin = INVALID_ADDRESS;
|
|
*end = INVALID_ADDRESS;
|
|
#endif //LOADTABLE_REFACTOR@xiaokeweng_20190423
|
|
}
|
|
|
|
void getAppCom_RDATA_MemAddr(UINT32* begin, UINT32* end)
|
|
{
|
|
*begin=get_factory_a_start_address();
|
|
*end=get_factory_a_end_address()-4-0x1000;
|
|
}
|
|
|
|
void getAppCom_RDATA_Bak_MemAddr(UINT32* begin, UINT32* end)
|
|
{
|
|
*begin=get_factory_b_start_address();
|
|
*end=get_factory_b_end_address()-4-0x1000;
|
|
}
|
|
|
|
|
|
|
|
|
|
void getAppCom_APRDATA_MemAddr(UINT32* begin, UINT32* end)
|
|
{
|
|
*begin=get_rd_begin_address();
|
|
*end=get_rd_end_address()-4;
|
|
}
|
|
|
|
|
|
void commImageTableInit(void)
|
|
{
|
|
pLoadTable = (LoadTableType*)&loadTable;
|
|
}
|
|
|
|
//xiaoke@20190303 ++ external LZOP RW compress
|
|
BOOL whether_RW_region_compressed(void){
|
|
BOOL ret = FALSE;
|
|
char tmp_pre_string[] = EXTERNAL_RW_REGION_PRE_STRING;
|
|
ASSERT((UINT32)pLoadTable != INVALID_ADDRESS);//commImageTableInit not available
|
|
|
|
rw_region_item tmp_cur_item;
|
|
|
|
//check the first item only
|
|
tmp_cur_item = pLoadTable->lt_area_rw_cpz_info.compress_rw_region_list[0];
|
|
|
|
if(!memcmp(tmp_cur_item.RW_REGION_MARK, tmp_pre_string, (sizeof(tmp_pre_string)-1) )){
|
|
//RW_REGION_MARK detected inside loadtable
|
|
if(tmp_cur_item.RW_REGION_COMPRESSED_ADDR == EXTERNAL_RW_REGION_COMPRESS_ADD_NULL){
|
|
//not compressed by external script, only do RW copy from Load_addr to Exec_addr
|
|
ret = FALSE;
|
|
}else{
|
|
//compressed image
|
|
ret = TRUE;
|
|
}
|
|
}
|
|
return ret;
|
|
}
|
|
//xiaoke@20190303 --
|
|
|
|
UINT32 getCommNumOfLife(void)
|
|
{
|
|
UINT32 numOfLife =0;
|
|
#if 0 //LOADTABLE_REFACTOR@xiaokeweng_20190423 for build pass
|
|
if((UINT32)pLoadTable != INVALID_ADDRESS)
|
|
numOfLife = pLoadTable->u.stLoadTable.numOfLife;
|
|
#endif
|
|
return (numOfLife);
|
|
}
|
|
|
|
BOOL StrtupIsPowerup(void)
|
|
{
|
|
return (getCommNumOfLife()<=1);
|
|
}
|
|
|
|
void incrementCommNumOfLife(void)
|
|
{
|
|
#if 0 //LOADTABLE_REFACTOR@xiaokeweng_20190423 for build pass
|
|
pLoadTable->u.stLoadTable.numOfLife++;
|
|
#endif
|
|
}
|
|
|
|
UINT32 get_rw_cpz_struct_addr(void)
|
|
{
|
|
return (unsigned int)pLoadTable->lt_area_rw_cpz_info.compress_rw_region_list;
|
|
}
|
|
|
|
UINT32 get_gpsfw_begin_addr(void)
|
|
{
|
|
_ptentry *gpsfw_begin_Entry = ptable_find_entry("jacana_fw");
|
|
|
|
if( gpsfw_begin_Entry ){
|
|
return gpsfw_begin_Entry->vstart;
|
|
}else{
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
UINT32 get_gpsfw_bin_size(void)
|
|
{
|
|
_ptentry *gpsfw_begin_Entry = ptable_find_entry("jacana_fw");
|
|
|
|
if( gpsfw_begin_Entry ){
|
|
return gpsfw_begin_Entry->vsize;
|
|
}else{
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
UINT32 get_gpspvt_begin_addr(void)
|
|
{
|
|
_ptentry *gpspvt_begin_Entry = ptable_find_entry("jacana_pvt");
|
|
|
|
if( gpspvt_begin_Entry ){
|
|
return gpspvt_begin_Entry->vstart;
|
|
}else{
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
UINT32 get_gpspvt_bin_size(void)
|
|
{
|
|
_ptentry *gpspvt_begin_Entry = ptable_find_entry("jacana_pvt");
|
|
|
|
if( gpspvt_begin_Entry ){
|
|
return gpspvt_begin_Entry->vsize;
|
|
}else{
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
BOOL IsHeapMemory(UINT8* pMem)
|
|
{
|
|
if(((UINT32)pMem >= (UINT32)(&Image$$DDR_HEAP_GUARD$$Base)) &&
|
|
((UINT32)pMem < (UINT32)(&Image$$DDR_HEAP_ENDMARK$$Base)))
|
|
{
|
|
return TRUE;
|
|
}
|
|
else
|
|
{
|
|
return FALSE;
|
|
}
|
|
}
|
|
#ifdef QUECTEL_PROJECT_CUST
|
|
UINT32 quec_get_patition_start_address(const char *patition_name)
|
|
{
|
|
#if 1
|
|
_ptentry * get_patition_start_Entry= ptable_find_entry(patition_name);
|
|
if(get_patition_start_Entry==NULL)
|
|
return 0;
|
|
return get_patition_start_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 quec_get_patition_end_address(const char *patition_name)
|
|
{
|
|
#if 1
|
|
_ptentry * get_patition_end_Entry= ptable_find_entry(patition_name);
|
|
if(get_patition_end_Entry==NULL)
|
|
return 0;
|
|
return get_patition_end_Entry->vstart+get_patition_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_end_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 quec_get_customer_fs_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * customer_fs_start_Entry= ptable_find_entry("customer_fs");
|
|
if(customer_fs_start_Entry==NULL)
|
|
return 0;
|
|
return customer_fs_start_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_start_address.value;
|
|
#endif
|
|
}
|
|
|
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UINT32 quec_get_customer_fs_end_address(void)
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{
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#if 1
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_ptentry * customer_fs_end_Entry= ptable_find_entry("customer_fs");
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if(customer_fs_end_Entry==NULL)
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|
return 0;
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return customer_fs_end_Entry->vstart+customer_fs_end_Entry->size;
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#else
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return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_end_address.value;
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|
#endif
|
|
}
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UINT32 quec_get_customer_backup_fs_start_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * customer_backup_fs_start_Entry= ptable_find_entry("customer_backup_fs");
|
|
if(customer_backup_fs_start_Entry==NULL)
|
|
return 0;
|
|
return customer_backup_fs_start_Entry->vstart;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_start_address.value;
|
|
#endif
|
|
}
|
|
|
|
UINT32 quec_get_customer_backup_fs_end_address(void)
|
|
{
|
|
#if 1
|
|
_ptentry * customer_backup_fs_end_Entry= ptable_find_entry("customer_backup_fs");
|
|
if(customer_backup_fs_end_Entry==NULL)
|
|
return 0;
|
|
return customer_backup_fs_end_Entry->vstart+customer_backup_fs_end_Entry->size;
|
|
#else
|
|
return pLoadTable->lt_area_armlink_symbol.armlink_symbol_info.nvm_end_address.value;
|
|
#endif
|
|
}
|
|
|
|
#endif
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|
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