309 lines
11 KiB
C
309 lines
11 KiB
C
#ifndef _SPI_DRV_H_
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#define _SPI_DRV_H_
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#include "QuecPrjName.h"
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#include "quec_mfpr_api.h"
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#if defined (__QUECTEL_PROJECT_EC600MCN_LA__) || defined (__QUECTEL_PROJECT_EC600MCN_LE__)\
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|| defined (__QUECTEL_PROJECT_EC600MCN_LC__) || defined (__QUECTEL_PROJECT_EC600MCN_LF__) \
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|| defined (__QUECTEL_PROJECT_EC600MCN_CC__) || defined (__QUECTEL_PROJECT_EC600MCN_MC__)\
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|| defined (__QUECTEL_PROJECT_EC600MEU_LA__) || defined (__QUECTEL_PROJECT_EC600MLA_LA__)
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#define QUEC_LCD_SPI_DCX_NUM GPIO_14
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#define QUEC_LCD_SPI_CS_NUM GPIO_13
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#define QUEC_LCD_SPI_RST_NUM GPIO_50
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#define QUEC_LCD_SPI_SCLK_NUM GPIO_12
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#define QUEC_LCD_SPI_SDA_NUM GPIO_15
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#define QUEC_LCD_SPI_DCX_AF MFP_AF0
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#define QUEC_LCD_SPI_CS_AF MFP_AF0
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#define QUEC_LCD_SPI_RST_AF MFP_AF0
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#define QUEC_LCD_SPI_SCLK_AF MFP_AF1
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#define QUEC_LCD_SPI_SDA_AF MFP_AF1
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#define SPI_LCD_CS 13
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#define SPI_LCD_RST 50
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#define SPI_LCD_DCX 14
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#elif defined (__QUECTEL_PROJECT_EC800MCN_GA__)||defined (__QUECTEL_PROJECT_EC800MCN_GD__) \
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|| defined (__QUECTEL_PROJECT_EC800MCN_LA__)||defined (__QUECTEL_PROJECT_EG810MCN_GA__)\
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|| defined (__QUECTEL_PROJECT_EC800MCN_CC__) || defined (__QUECTEL_PROJECT_EC800MCN_NC__)\
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|| defined (__QUECTEL_PROJECT_EC800MCN_MC__)|| defined (__QUECTEL_PROJECT_EC800MCN_LF__)\
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|| defined (__QUECTEL_PROJECT_EC800MCN_LC__)|| defined (__QUECTEL_PROJECT_EG810MCN_LA__)\
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|| defined (__QUECTEL_PROJECT_EC800MCN_LE__)|| defined (__QUECTEL_PROJECT_EC800MCN_GM__)\
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|| defined (__QUECTEL_PROJECT_EG800PCN_LA__)|| defined (__QUECTEL_PROJECT_EC800MCN_GC__)\
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|| defined (__QUECTEL_PROJECT_EG810MCN_LC__)|| defined (__QUECTEL_PROJECT_EG810MEU_LC__)\
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|| defined (__QUECTEL_PROJECT_EG810MLA_LC__)
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#define QUEC_LCD_SPI_DCX_NUM GPIO_35
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#define QUEC_LCD_SPI_CS_NUM GPIO_34
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#define QUEC_LCD_SPI_RST_NUM GPIO_32
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#define QUEC_LCD_SPI_SCLK_NUM GPIO_33
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#define QUEC_LCD_SPI_SDA_NUM GPIO_36
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#define QUEC_LCD_SPI_DCX_AF MFP_AF0
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#define QUEC_LCD_SPI_CS_AF MFP_AF0
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#define QUEC_LCD_SPI_RST_AF MFP_AF0
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#define QUEC_LCD_SPI_SCLK_AF MFP_AF2
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#define QUEC_LCD_SPI_SDA_AF MFP_AF2
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#define SPI_LCD_CS 34
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#define SPI_LCD_RST 32
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#define SPI_LCD_DCX 35
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#elif defined (__QUECTEL_PROJECT_EC600KCN_CC__) || defined (__QUECTEL_PROJECT_EC600KCN_LC__) || defined (__QUECTEL_PROJECT_EC600KCN_MC__)\
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|| defined(__QUECTEL_PROJECT_EC600KCN_CK__) || defined (__QUECTEL_PROJECT_EC600KCN_LK__)
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#define QUEC_LCD_SPI_DCX_NUM GPIO_35
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#define QUEC_LCD_SPI_CS_NUM GPIO_34
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#define QUEC_LCD_SPI_RST_NUM MFPR_OFFSET(50) //GPIO55
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#define QUEC_LCD_SPI_SCLK_NUM GPIO_33
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#define QUEC_LCD_SPI_SDA_NUM GPIO_36
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#define QUEC_LCD_SPI_DCX_AF MFP_AF0
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#define QUEC_LCD_SPI_CS_AF MFP_AF0
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#define QUEC_LCD_SPI_RST_AF MFP_AF0
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#define QUEC_LCD_SPI_SCLK_AF MFP_AF1
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#define QUEC_LCD_SPI_SDA_AF MFP_AF1
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#define SPI_LCD_CS 34
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#define SPI_LCD_RST 55
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#define SPI_LCD_DCX 35
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//600K???SPI??????0
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#define SPI_CONETROLER_0_ENABLE
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#elif defined (__QUECTEL_PROJECT_EG800KCN_GC__) || defined (__QUECTEL_PROJECT_EC800KCN_LC__)||defined (__QUECTEL_PROJECT_EG800AKCN_91LC__)\
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|| defined (__QUECTEL_PROJECT_EC800KCN_CC__) || defined (__QUECTEL_PROJECT_EG800KLA_CC__)\
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|| defined (__QUECTEL_PROJECT_EC800KCN_MD__) || defined (__QUECTEL_PROJECT_EC800KCN_MC__)\
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|| defined (__QUECTEL_PROJECT_EG800KEU_CC__) || defined (__QUECTEL_PROJECT_EG800KLA_LC__)\
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|| defined (__QUECTEL_PROJECT_EC800KCN_CK__) || defined (__QUECTEL_PROJECT_EC800KCN_LK__)\
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|| defined (__QUECTEL_PROJECT_EG800KEU_LC__) || defined (__QUECTEL_PROJECT_EG800WCN_11LG__) || defined (__QUECTEL_PROJECT_EG800AKCN_90LC__)\
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||defined (__QUECTEL_PROJECT_EG800AKCN_11LG__)||defined (__QUECTEL_PROJECT_EG800AKEU_11LC__) \
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||defined (__QUECTEL_PROJECT_EG800AKLA_11LC__)||defined (__QUECTEL_PROJECT_EG800AKEU_11LG__)|| defined (__QUECTEL_PROJECT_EG800AKLA_00LC__)\
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||defined (__QUECTEL_PROJECT_EG800AKCN_11LN__)||defined (__QUECTEL_PROJECT_EG800AKEU_00LC__)||defined (__QUECTEL_PROJECT_EG800AKGL_11LC__)\
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||defined (__QUECTEL_PROJECT_EG800AKLA_11LG__)
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#define QUEC_LCD_SPI_DCX_NUM GPIO_14
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#define QUEC_LCD_SPI_CS_NUM GPIO_13
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#define QUEC_LCD_SPI_RST_NUM MFPR_OFFSET(48) //GPIO_90
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#define QUEC_LCD_SPI_SCLK_NUM GPIO_12
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#define QUEC_LCD_SPI_SDA_NUM GPIO_15
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#define QUEC_LCD_SPI_DCX_AF MFP_AF0
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#define QUEC_LCD_SPI_CS_AF MFP_AF0
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#define QUEC_LCD_SPI_RST_AF MFP_AF0
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#define QUEC_LCD_SPI_SCLK_AF MFP_AF1
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#define QUEC_LCD_SPI_SDA_AF MFP_AF1
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#define SPI_LCD_CS 13
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#define SPI_LCD_RST 90
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#define SPI_LCD_DCX 14
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#elif defined (__QUECTEL_PROJECT_EC200MCN_LC__)|| defined (__QUECTEL_PROJECT_EC200MCN_LF__)
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#define QUEC_LCD_SPI_DCX_NUM GPIO_35
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#define QUEC_LCD_SPI_CS_NUM GPIO_34
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#define QUEC_LCD_SPI_RST_NUM GPIO_12
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#define QUEC_LCD_SPI_SCLK_NUM GPIO_33
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#define QUEC_LCD_SPI_SDA_NUM GPIO_36
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#define QUEC_LCD_SPI_DCX_AF MFP_AF0
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#define QUEC_LCD_SPI_CS_AF MFP_AF0
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#define QUEC_LCD_SPI_RST_AF MFP_AF0
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#define QUEC_LCD_SPI_SCLK_AF MFP_AF2
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#define QUEC_LCD_SPI_SDA_AF MFP_AF2
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#define SPI_LCD_CS 34
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#define SPI_LCD_RST 12
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#define SPI_LCD_DCX 35
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#elif defined(__QUECTEL_PROJECT_EG915KEU_LA__)|| defined (__QUECTEL_PROJECT_EG915KEU_LC__)|| defined (__QUECTEL_PROJECT_EG915KEU_LG__)|| defined (__QUECTEL_PROJECT_EG915KLA_LC__)|| defined (__QUECTEL_PROJECT_EG915KLA_LA__) || defined (__QUECTEL_PROJECT_EG915KLA_LG__)
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#define QUEC_LCD_SPI_DCX_NUM GPIO_35
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#define QUEC_LCD_SPI_CS_NUM GPIO_34
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#define QUEC_LCD_SPI_RST_NUM GPIO_08
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#define QUEC_LCD_SPI_SCLK_NUM GPIO_33
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#define QUEC_LCD_SPI_SDA_NUM GPIO_36
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#define QUEC_LCD_SPI_DCX_AF MFP_AF0
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#define QUEC_LCD_SPI_CS_AF MFP_AF0
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#define QUEC_LCD_SPI_RST_AF MFP_AF0
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#define QUEC_LCD_SPI_SCLK_AF MFP_AF1
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#define QUEC_LCD_SPI_SDA_AF MFP_AF1
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#define SPI_LCD_CS 34
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#define SPI_LCD_RST 8
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#define SPI_LCD_DCX 35
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#elif defined (__QUECTEL_PROJECT_EG600AKCN_90LC__) || defined (__QUECTEL_PROJECT_EG600AKCN_91LC__)\
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||defined (__QUECTEL_PROJECT_EG600AKCN_00LC__) || defined (__QUECTEL_PROJECT_EG600AKCN_11LC__)\
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||defined (__QUECTEL_PROJECT_EG600AKCN_11LG__)
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#define QUEC_LCD_SPI_DCX_NUM GPIO_35
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#define QUEC_LCD_SPI_CS_NUM GPIO_34
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#define QUEC_LCD_SPI_RST_NUM MFPR_OFFSET(48) //GPIO_90 PRI_TDO
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#define QUEC_LCD_SPI_SCLK_NUM GPIO_33
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#define QUEC_LCD_SPI_SDA_NUM GPIO_36
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#define QUEC_LCD_SPI_DCX_AF MFP_AF0
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#define QUEC_LCD_SPI_CS_AF MFP_AF0
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#define QUEC_LCD_SPI_RST_AF MFP_AF0
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#define QUEC_LCD_SPI_SCLK_AF MFP_AF1
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#define QUEC_LCD_SPI_SDA_AF MFP_AF1
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#define SPI_LCD_CS 34
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#define SPI_LCD_RST 90
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#define SPI_LCD_DCX 35
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#define SPI_CONETROLER_0_ENABLE
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#elif defined(__QUECTEL_PROJECT_EG915NEA_AK__) || defined(__QUECTEL_PROJECT_EG915NLA_AK__) || \
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defined(__QUECTEL_PROJECT_EG915NLA_AF__) || defined(__QUECTEL_PROJECT_EG915NEA_AG__) || \
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defined(__QUECTEL_PROJECT_EG915NEA_AC__) || defined(__QUECTEL_PROJECT_EC600NCN_AC__) || \
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defined(__QUECTEL_PROJECT_EG915NLA_GK__)
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#define QUEC_LCD_SPI_DCX_NUM GPIO_14
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#define QUEC_LCD_SPI_CS_NUM GPIO_13
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#define QUEC_LCD_SPI_RST_NUM GPIO_31
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#define QUEC_LCD_SPI_SCLK_NUM GPIO_12
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#define QUEC_LCD_SPI_SDA_NUM GPIO_15
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#define QUEC_LCD_SPI_DCX_AF MFP_AF0
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#define QUEC_LCD_SPI_CS_AF MFP_AF0
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#define QUEC_LCD_SPI_RST_AF MFP_AF0
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#define QUEC_LCD_SPI_SCLK_AF MFP_AF1
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#define QUEC_LCD_SPI_SDA_AF MFP_AF1
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#define SPI_LCD_CS 13
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#define SPI_LCD_RST 31
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#define SPI_LCD_DCX 14
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#else
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#error "Please configure the project"
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#endif
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#define SPI_SCLK_FREQ 10000
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enum{
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SPI_EDGE_RISING = 0,
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SPI_EDGE_FALLING = 1,
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SPI_EDGE_LIMIT
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};
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enum{
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SPI_INTER_FLAG_FRAMEDONE = 0x1,
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SPI_INTER_FLAG_LIMIT,
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};
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enum{
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SPI_ENDIAN_LSB = 0,
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SPI_ENDIAN_MSB = 1,
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SPI_ENDIAN_LIMIT
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};
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enum{
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SPI_PATH_IMAGE = 0,
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SPI_PATH_REGISTER = 1,
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SPI_PATH_LIMIT
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};
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enum{
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SPI_FORMAT_RGB565 = 0,
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SPI_FORMAT_RGB666 = 1,
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SPI_FORMAT_RGB666_2_3 = 2,
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SPI_FORMAT_RGB888 = 3,
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SPI_FORMAT_RGB888_2_3 = 4,
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SPI_FORMAT_LIMIT
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};
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enum{
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SPI_STATUS_UNINIT = 0,
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SPI_STATUS_INIT = 1,
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SPI_STATUS_LIMIT
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};
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enum{
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SPI_CONETROLER_0 = 0,
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SPI_CONETROLER_1 = 1,
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SPI_CONETROLER_LIMIT
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};
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enum{
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SPI_WORK_MODE_POLLING,
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SPI_WORK_MODE_DMA,
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SPI_WORK_MODE_LIMIT
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};
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enum{
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SPI_6_5M = 0,
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SPI_13M = 1,
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SPI_26M,
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SPI_52M,
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SPI_3_25M,
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SPI_1_625M,
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SPI_812_5k,
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SPI_CLK_LIMIT
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};
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typedef enum
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{
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spi_rx = 0,
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spi_tx,
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max_dir,
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}spidir;
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struct timing_spi {
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unsigned int wclk; /*KHz*/
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unsigned int rclk; /*KHz*/
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};
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struct spi_info{
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unsigned short line_num; /*3 or 4*/
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unsigned short interface_id; /*1 or 2*/
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unsigned short data_lane_num; /*1 or 2*/
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unsigned short format;
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unsigned short device_id; /*0 or 1*/
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unsigned short sample_edge;
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unsigned short force_cs; /*0-disable, 1-enable*/
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unsigned short endian;
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unsigned short reserved;
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struct timing_spi *timing;
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};
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struct s_spi_base_ctx{
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unsigned int base_addr;
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unsigned int sclk; /*KHz*/
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unsigned char cur_path;
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unsigned char cur_cs;
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unsigned char work_mode;
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unsigned char reserved;
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};
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struct s_spi_ctx{
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unsigned int base_addr;
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unsigned int sclk; /*KHz*/
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unsigned short cur_path;
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unsigned short cur_cs;
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unsigned short status;
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unsigned char work_mode;
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unsigned char reserved;
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struct spi_info info;
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};
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struct s_spi_ctx* spi_init(unsigned int sclk, struct spi_info *info, int work_mode);
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int spi_write_cmd(struct s_spi_ctx *spi_ctx, unsigned int cmd, unsigned int bits);
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int spi_write_data(struct s_spi_ctx *spi_ctx, unsigned int data, unsigned int bits);
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int spi_read_data(struct s_spi_ctx *spi_ctx, unsigned int cmd, unsigned int cmd_bits,
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unsigned int *data, unsigned int data_bits);
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int spi_lcd_init(unsigned char controler);
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void spi_set_clk_rate(unsigned int clk_dev);
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void ssp_write_cmd_data_to_LCD(unsigned int cmd, unsigned int data,unsigned int data_bits,unsigned short line_num);
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void ssp_write_data_to_LCD_Gram(unsigned short* data,unsigned int sum_pixel,unsigned int data_bits,unsigned short line_num);
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void spi_dma_init(void);
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void ssp_read_data_from_LCD(unsigned int *data, unsigned int data_bits);
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void wait_ssp_write_data_to_LCD_complete(void);
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void spi_set_cs_high(void);
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void spi_set_cs_low(void);
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void LCD_Pinmuxcfg(unsigned int interface);
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int spi_update(struct s_spi_ctx *spi_ctx, int work_mode);
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void lcd_spi_set_data_mode(void);
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void spi_write_data_dma(unsigned short* data,unsigned int sum_pixel,unsigned int data_bits,unsigned short line_num);
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void lcd_spi_set_cmd_mode(void);
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void spi_uninit(struct s_spi_ctx *spi_ctx);
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void spi_reset(struct s_spi_ctx *spi_ctx);
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#endif /*_SPI_DRV_H_*/
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