43 lines
1.6 KiB
C
43 lines
1.6 KiB
C
/*------------------------------------------------------------
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(C) Copyright [2006-2008] Marvell International Ltd.
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All Rights Reserved
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------------------------------------------------------------*/
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typedef enum
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{
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//PWR Mode entry & exit messages
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PWR_MODE_ENTRY_C0 = 0x8400,
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PWR_MODE_ENTRY_C1 = 0x8401,
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PWR_MODE_ENTRY_D2_WO_VCXO_SD = 0x8402,
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PWR_MODE_ENTRY_D2 = 0x8403,
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PWM_MODE_D2_INTERRUPTED = 0x8404,
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PWR_MODE_ENTRY_C1_GATED = 0x8405,
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// Product Point in use messages
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PP_D0CS_IN_USE = 0x8410,
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PP_1_IN_USE = 0x8411,
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PP_2_IN_USE = 0x8412,
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PP_3_IN_USE = 0x8413,
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PP_4_IN_USE = 0x8414,
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PP_D0CS_NOT_IN_USE = 0x8415,
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//Comm (AC-IPC) messaging
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DDR_REQUEST = 0x8420,
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DDR_REQ_ACK = 0x8421,
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DDR_RELINQUISH = 0x8422,
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DDR_HF_REQUEST = 0x8423,
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DDR_HF_REQ_ACK = 0x8424,
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DDR_HF_RELINQUISH = 0x8425,
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DDR_HF_REL_ACK = 0x8426,
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//for mips_ram
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WATCHDOG_EVENT_KICK = 0x8430,
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// messages with wakeup src data
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WAKEUP_SOURCE = 0x8540, //this message requires data to be sent as well in 6 LS bits
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D2_WAKEUP_ENABLE = 0x8580, // this message requires data to be sent as well in 6 LS bits
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D2_WAKEUP_DISABLE = 0x85C0, // this message requires data to be sent as well in 6 LS bits
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// messages with clk data
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CLOCK_ENABLE = 0x8640, // this message requires data to be sent as well in 6 LS bits
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CLOCK_DISABLE = 0x8680, // this message requires data to be sent as well in 6 LS bits
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}CT_P_pm_traces_t;
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#define CTP_BOERNE_WAKEUP_ID_OFFSET 20
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#define D2_WAKEUP_SOURCE WAKEUP_SOURCE
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