614 lines
17 KiB
C
614 lines
17 KiB
C
/*========================================================================================================================
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Copyright (c) 2022 Quectel Wireless Solution, Co., Ltd. All Rights Reserved.
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Quectel Wireless Solution Proprietary and Confidential.
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========================================================================================================================*/
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/*=================================================================
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EDIT HISTORY FOR MODULE
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This section contains comments describing changes made to the module.
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Notice that changes are listed in reverse chronological order.
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WHEN WHO WHAT, WHERE, WHY
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------------ ------- -------------------------------------------------------------------------------
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2022/04/26 Fias.fan 此文件用于LCD的SPI驱动,不建议客户改动,且要注意不同LCD的驱动时序有差别
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==========================================================================================================================*/
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#include "common.h"
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#include "bsp.h"
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#include "mfpr_api.h"
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#include "quec_ssp_lcd.h"
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#include "quec_spi_drv.h"
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#include "quec_startup_gpio.h"
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//此延时函数，用于LCD-spi相关的延时
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static __inline void uudelay(int us)
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{
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volatile uint32_t i;
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for(i=0; i<us*100;i++)
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i = i+1;
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}
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static __inline void mdelay(int ms){
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volatile uint32_t i;
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for(i=0; i<ms;i++)
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uudelay(10);
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}
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struct s_spi_ctx g_spi_ctx;
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void spi_uninit(struct s_spi_ctx *spi_ctx)
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{
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//ToDo...
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}
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struct s_spi_ctx* spi_init(uint32_t sclk, struct spi_info *info, int32_t work_mode)
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{
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int dividor=0;
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struct s_spi_ctx *spi_ctx = &g_spi_ctx;
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int reg = 0;
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LCDLOGI("spi_init +++\r\n");
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if(info == NULL || info->timing == NULL){
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LCDLOGE("ERROR: spi_init, Invalid param!\r\n");
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return NULL;
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}
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if(LCD_WORK_MODE_INTERRUPT == work_mode)
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{
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LCDLOGW("WARNING: spi_init, no interrupt mode supported! change to polling mode!\r\n");
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work_mode = LCD_WORK_MODE_POLLING;
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}
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if((info->format != SPI_FORMAT_RGB565) &&
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(info->format != SPI_FORMAT_RGB666) && (info->data_lane_num == 1))
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{
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LCDLOGE("ERROR: spi_init, Format error!\r\n");
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return NULL;
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}
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spi_ctx->cur_path = 0;
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spi_ctx->cur_cs = 0;
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spi_ctx->sclk = sclk;
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spi_ctx->info.line_num = info->line_num;
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spi_ctx->info.interface_id = info->interface_id;
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spi_ctx->info.data_lane_num = info->data_lane_num;
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spi_ctx->info.format = info->format;
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spi_ctx->info.device_id = info->device_id;
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spi_ctx->info.sample_edge = info->sample_edge;
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spi_ctx->info.force_cs = info->force_cs;
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spi_ctx->info.endian = info->endian;
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spi_ctx->info.timing = info->timing;
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spi_ctx->work_mode = work_mode;
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spi_ctx->status = SPI_STATUS_INIT;
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spi_lcd_init();
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LCDLOGI("spi_init ----\r\n");
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return spi_ctx;
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}
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int spi_update(struct s_spi_ctx *spi_ctx, int32_t work_mode)
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{
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LCDLOGI("spi_update +++\r\n");
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if(LCD_WORK_MODE_INTERRUPT == work_mode){
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LCDLOGW("WARNING: spi_init, no interrupt mode supported! change to polling mode!\r\n");
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work_mode = LCD_WORK_MODE_POLLING;
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}
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spi_ctx->work_mode = work_mode;
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LCDLOGI("spi_update ----\r\n");
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return 0;
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}
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int spi_write_cmd(struct s_spi_ctx *spi_ctx, uint32_t cmd, uint32_t bits)
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{
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if(NULL == spi_ctx || bits > 32 || 0 == bits){
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LCDLOGE("ERROR: spi_write_cmd, Invalid param\r\n");
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return -1;
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}
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if(SPI_STATUS_INIT != spi_ctx->status){
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LCDLOGE("ERROR: spi_write_cmd, Invalid mcu status\r\n");
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return -1;
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}
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if((spi_ctx->info.force_cs == 1) && (spi_ctx->cur_cs == 0)){
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LCDLOGE("ERROR: spi_write_cmd, Invalid CS status\r\n");
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return -1;
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}
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if (4 == spi_ctx->info.line_num)
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{
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quec_gpio_set_value(LCD_SPI_RS, 0);
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}
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quec_gpio_set_value(LCD_SPI_CS, 0);
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ssp_write_cmd_data_to_LCD(0, cmd, bits, spi_ctx->info.line_num);
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mdelay(5);//20231026 Increase the delay ，slow down cs pull up speed to ensure successful LCD register initialization
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quec_gpio_set_value(LCD_SPI_CS, 1);
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return 0;
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}
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int spi_write_data(struct s_spi_ctx *spi_ctx, uint32_t data, uint32_t bits)
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{
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if(NULL == spi_ctx || bits > 32 || 0 == bits){
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LCDLOGE("ERROR: spi_write_data, Invalid param\r\n");
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return -1;
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}
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if(SPI_STATUS_INIT != spi_ctx->status){
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LCDLOGE("ERROR: spi_write_data, Invalid mcu status\r\n");
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return -1;
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}
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if((spi_ctx->info.force_cs == 1) && (spi_ctx->cur_cs == 0)){
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LCDLOGE("ERROR: spi_write_data, Invalid CS status\r\n");
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return -1;
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}
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if (4 == spi_ctx->info.line_num)
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{
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quec_gpio_set_value(LCD_SPI_RS, 1);
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}
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quec_gpio_set_value(LCD_SPI_CS, 0);
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ssp_write_cmd_data_to_LCD(1, data, bits, spi_ctx->info.line_num);
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mdelay(5);//20231026 Increase the delay ，slow down cs pull up speed to ensure successful LCD register initialization
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quec_gpio_set_value(LCD_SPI_CS, 1);
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return 0;
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}
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int spi_read_data(struct s_spi_ctx *spi_ctx, uint32_t cmd, uint32_t cmd_bits,
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uint32_t *data, uint32_t data_bits)
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{
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uint32_t value_and = 0;
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value_and = (1 << data_bits) - 1;
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if(NULL == spi_ctx || cmd_bits > 32 || data_bits > 32){
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LCDLOGE("ERROR: spi_read_data, Invalid param\r\n");
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return -1;
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}
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if(SPI_STATUS_INIT != spi_ctx->status){
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LCDLOGE("ERROR: spi_read_data, Invalid mcu status\r\n");
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return -1;
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}
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if((spi_ctx->info.force_cs == 1) && (spi_ctx->cur_cs == 0)){
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LCDLOGE("ERROR: spi_read_data, Invalid CS status\r\n");
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return -1;
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}
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if (4 == spi_ctx->info.line_num)
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{
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quec_gpio_set_value(LCD_SPI_RS, 0);
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}
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quec_gpio_set_value(LCD_SPI_CS, 0);
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ssp_write_cmd_data_to_LCD(0, cmd, cmd_bits, spi_ctx->info.line_num);
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mdelay(10);//延时的时间的长短的依据是什么？
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ssp_read_data_from_LCD(data, data_bits);
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quec_gpio_set_value(LCD_SPI_CS, 1);
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return 0;
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}
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/* 2021-01-27 added for CraneM & CraneL*/
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#define TX_FIFO_INT_EN (0x1<<3) //SSP_INT_EN[3]
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#define RX_FIFO_INT_EN (0x1<<2) //SSP_INT_EN[2]
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#define TIMEOUT_EN (0x1<<1) //SSP_INT_EN[1]
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#define PERI_TRAIL_EN (0x1<<0) //SSP_INT_EN[0]
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#define SSPSFRM_M (0x0<<4) //SSP_TOP_CTRL[4]
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#define SSPSCLK_M (0x0<<3) //SSP_TOP_CTRL[3]
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#define FRF_SPI (0x0<<1) //SSP_TOP_CTRL[2:1]
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#define SSP_FORMAT FRF_SPI
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#define RX_AUTO_FULL_CTRL_EN (0x1<<17) //SSP_FIFO_CTRL[17]
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#define FIFO_UNPACKING (0x0<<16) //SSP_FIFO_CTRL[16]
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#define RX_THRES_7 (0x7<<5) //SSP_FIFO_CTRL[9:5]
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#define TX_THRES_7 (0x7<<0) //SSP_FIFO_CTRL[4:0]
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#define SSE_EN (0x1<<0) //SSP_TOP_CTRL[0]
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#define SSP0_BASE_ADDRESS 0xD401B000
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#define APB_SSP0_CLK_RST 0xd401501c
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#define SSP2_BASE_ADDRESS 0xD401C000
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#define APB_SSP2_CLK_RST 0xd401504c
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#define DW_9BITS (0x8 << 5)
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#define SSP_DATAR 0x10
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#define SSP_STATUS 0x14
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static __inline void reg_write(uint32_t reg, uint32_t val)
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{
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(*(volatile unsigned long *)(reg)) = val;
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}
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static __inline void ssp0_reg_write(uint32_t reg, uint32_t val)
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{
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reg_write(SSP0_BASE_ADDRESS + reg, val);
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}
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static __inline uint32_t ssp0_reg_read(uint32_t reg)
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{
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return (*(volatile uint32_t *)(SSP0_BASE_ADDRESS + reg));
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}
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static __inline void ssp2_reg_write(uint32_t reg, uint32_t val)
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{
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reg_write(SSP2_BASE_ADDRESS + reg, val);
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}
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static __inline uint32_t ssp2_reg_read(uint32_t reg)
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{
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return (*(volatile uint32_t *)(SSP2_BASE_ADDRESS + reg));
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}
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void spi_dump(void)
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{
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UINT32 i = 0;
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#ifdef _QUEC_LCD_SSP0_ //打开宏则选用SSP0通道
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for ( i = 0; i < 12; i++) {
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LCDLOGE("---SSP0 start dump---\r\n");
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LCDLOGE("SSPI0 offset: 0x%x, value:0x%lx\r\n", i * 4, ssp0_reg_read(i * 4));
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}
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LCDLOGE("SPS0 offset: 0x54, value:0x%lx\r\n", ssp0_reg_read(0x54));
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LCDLOGE("---SSP0 dump end---\r\n");
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#elif defined _QUEC_LCD_SSP2_ //默认选用SSP2通道
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for ( i = 0; i < 12; i++) {
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LCDLOGE("---SSP2 start dump---\r\n");
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LCDLOGE("SSPI2 offset: 0x%x, value:0x%lx\r\n", i * 4, ssp2_reg_read(i * 4));
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}
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LCDLOGE("SPS2 offset: 0x54, value:0x%lx\r\n", ssp2_reg_read(0x54));
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LCDLOGE("---SSP2 dump end---\r\n");
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#endif
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}
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void spi_set_clk_rate(unsigned int clk_dev)
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{
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if (clk_dev >= SPI_CLK_LIMIT) {
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LCDLOGE("[Error]: not supported spi clk\r\n");
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return;
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}
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#ifdef _QUEC_LCD_SSP0_ //打开宏则选用SSP0通道
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reg_write(APB_SSP0_CLK_RST, 0x3 | (clk_dev << 4));
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#elif defined _QUEC_LCD_SSP2_ //默认选用SSP2通道
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reg_write(APB_SSP2_CLK_RST, 0x3 | (clk_dev << 4));
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#endif
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}
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int quec_lcd_spi_cs_init(GPIO_PIN_NUMBER_E gpio_pin)
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{
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if(CHIP_IS_CRANEM || CHIP_IS_CRANEL||CHIP_IS_CRANELRH)
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{
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ql_gpio_init(gpio_pin,PIN_DIRECTION_OUT,PIN_PULL_DISABLE,PIN_LEVEL_HIGH); //CS--默认状态为高
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LCDLOGI("quec_lcd_spi_cs_init GPIO(%d)\r\n",gpio_pin);
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return 0;
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}
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//使用LCD-SPi控制器控制CS引脚
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//ToDo
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}
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void spi_lcd_init(void)
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{
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uint32_t ssp_top_cfg=0, ssp_fifo_cfg=0;
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uint32_t ssp_int_en_cfg=0, ssp_to_cfg=0;
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//ToDo----SPI pin的初始化 ?
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if(CHIP_IS_CRANEL||CHIP_IS_CRANELRH) //Fias 2022-04-25 EC600M GPIO配置
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{
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quec_lcd_spi_cs_init(LCD_SPI_CS); //CS
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//600MCN_XX
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#if defined (__QUECTEL_PROJECT_EC600MCN_XX__) \
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|| defined (__QUECTEL_PROJECT_EC600MCN_LA__) || defined (__QUECTEL_PROJECT_EC600MCN_LE__) \
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|| defined (__QUECTEL_PROJECT_EC600MCN_LC__)|| defined (__QUECTEL_PROJECT_EC600MCN_LF__)\
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|| defined (__QUECTEL_PROJECT_EC600MCN_MC__)
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quec_set_gpio_mfprReg(LCD_SPI_CLK,(MFP_PULL_HIGH|MFP_DRIVE_MEDIUM|MFP_AF1)); //CLK
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quec_set_gpio_mfprReg(LCD_SPI_DOUT,(MFP_PULL_HIGH|MFP_DRIVE_MEDIUM|MFP_AF1)); //TX
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//800MCN_XX
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#elif defined (__QUECTEL_PROJECT_EC800MCN_XX__) \
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|| defined(__QUECTEL_PROJECT_EC800MCN_GA__) || defined (__QUECTEL_PROJECT_EC800MCN_LA__)\
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|| defined (__QUECTEL_PROJECT_EG810MCN_GA__)|| defined (__QUECTEL_PROJECT_EC800MCN_CC__) \
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|| defined (__QUECTEL_PROJECT_EC800MCN_NC__)|| defined (__QUECTEL_PROJECT_EC800MCN_MC__)\
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|| defined (__QUECTEL_PROJECT_EC800MCN_LF__)|| defined (__QUECTEL_PROJECT_EG810MCN_LA__)\
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|| defined (__QUECTEL_PROJECT_EG800PCN_LA__)
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quec_set_gpio_mfprReg(LCD_SPI_CLK,(MFP_PULL_HIGH|MFP_DRIVE_MEDIUM|MFP_AF2)); //CLK
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quec_set_gpio_mfprReg(LCD_SPI_DOUT,(MFP_PULL_HIGH|MFP_DRIVE_MEDIUM|MFP_AF2)); //TX
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//800AK
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#elif defined (__QUECTEL_PROJECT_EG800AKCN_XX__)
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quec_set_gpio_mfprReg(LCD_SPI_CLK,(MFP_PULL_HIGH|MFP_DRIVE_MEDIUM|MFP_AF1)); //CLK
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quec_set_gpio_mfprReg(LCD_SPI_DOUT,(MFP_PULL_HIGH|MFP_DRIVE_MEDIUM|MFP_AF1)); //TX
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#else
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LCDLOGI("Please configure the project\n");
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#endif
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}
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#ifdef _QUEC_LCD_SSP0_
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reg_write(APB_SSP0_CLK_RST, 0x7);
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#elif defined _QUEC_LCD_SSP2_ //默认选用SSP2通道
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reg_write(APB_SSP2_CLK_RST, 0x7);
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#endif
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spi_set_clk_rate(LCD_SCLK_READ_FREQ);
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ssp_top_cfg = 0x4d00;
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ssp_to_cfg = 0x200;
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ssp_fifo_cfg = 0x200e7;
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ssp_int_en_cfg = 0xf;
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#ifdef _QUEC_LCD_SSP0_ //打开宏则选用SSP0通道
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ssp0_reg_write(0, ssp_top_cfg);
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ssp0_reg_write(0x4, ssp_fifo_cfg);
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ssp0_reg_write(0x8, ssp_int_en_cfg);
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ssp0_reg_write(0xc, ssp_to_cfg);
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ssp0_reg_write(0, ssp_top_cfg | 0x1);
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#elif defined _QUEC_LCD_SSP2_ //默认选用SSP2通道
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ssp2_reg_write(0, ssp_top_cfg);
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ssp2_reg_write(0x4, ssp_fifo_cfg);
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ssp2_reg_write(0x8, ssp_int_en_cfg);
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ssp2_reg_write(0xc, ssp_to_cfg);
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ssp2_reg_write(0, ssp_top_cfg | 0x1);
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#endif
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}
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void ssp_write_cmd_data_to_LCD(uint32_t cmd, uint32_t data,uint32_t data_bits,uint16_t line_num)
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{
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int reg=0;
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if ((data_bits < 1) || (data_bits > 31)) {
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LCDLOGE("[Error]: not supported spi data bits\r\n");
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return;
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}
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#ifdef _QUEC_LCD_SSP0_ //打开宏则选用SSP0通道
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ssp0_reg_write(0x54, 0x5);
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reg = ssp0_reg_read(0) & ~(0x1f << 5);
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if (line_num == 3) {
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ssp0_reg_write(0, reg | (data_bits << 5));//9 bits
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if (!cmd)
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ssp0_reg_write(SSP_DATAR, data);
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else
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ssp0_reg_write(SSP_DATAR, (1 << data_bits) | data);
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} else if (line_num == 4) {
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ssp0_reg_write(0, reg | ((data_bits - 1) << 5));
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ssp0_reg_write(SSP_DATAR, data);
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} else
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{
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LCDLOGE("[ERROR]: not supported spi line number_ssp0_reg!\r\n");
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}
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mdelay(1);
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#elif defined _QUEC_LCD_SSP2_ //默认选用SSP2通道
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ssp2_reg_write(0x54, 0x5);
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reg = ssp2_reg_read(0) & ~(0x1f << 5);
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if (line_num == 3)
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{
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ssp2_reg_write(0, reg | (data_bits << 5));//9 bits
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if (!cmd)
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ssp2_reg_write(SSP_DATAR, data);
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else
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ssp2_reg_write(SSP_DATAR, (1 << data_bits) | data);
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}
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else if (line_num == 4)
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{
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ssp2_reg_write(0, reg | ((data_bits - 1) << 5));
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ssp2_reg_write(SSP_DATAR, data);
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}
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else
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LCDLOGE("[ERROR]: not supported spi line number!\r\n");
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mdelay(1);
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#endif
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}
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void ssp_write_data_to_LCD_Gram(uint16_t* data, uint32_t sum_pixel,uint32_t data_bits, uint16_t line_num)
|
||
{
|
||
int i=0, cnt=0, reg=0;
|
||
|
||
if ((data_bits < 1) || (data_bits > 31)) {
|
||
LCDLOGE("[Error]: not supported spi data bits\r\n");
|
||
return;
|
||
}
|
||
#ifdef _QUEC_LCD_SSP0_ //打开宏则选用SSP0通道
|
||
|
||
ssp0_reg_write(0x54, 0x5);
|
||
reg = ssp0_reg_read(0) & ~(0x1f << 5);
|
||
|
||
if (line_num == 3) {
|
||
ssp0_reg_write(0, reg | (8 << 5));
|
||
} else if (line_num == 4) {
|
||
ssp0_reg_write(0, reg | ((data_bits -1) << 5));
|
||
}
|
||
|
||
for (i = 0; i < sum_pixel; i++)
|
||
{
|
||
cnt = 0;
|
||
/* wait for TX not full *///只有当Tx fifo不为满状态才可以继续向Fifo里写数据
|
||
while (!(ssp0_reg_read(SSP_STATUS) & (0x1 << 6))) {
|
||
if (cnt ++ > 1000000) {
|
||
LCDLOGE("ERROR: spi write byte error_ssp0_reg!\r\n");
|
||
return;
|
||
}
|
||
}
|
||
|
||
if (line_num == 3)
|
||
{
|
||
if ((data_bits == 16) || (data_bits == 8))
|
||
{
|
||
ssp0_reg_write(SSP_DATAR, (1 << 8) | (*(data + i) >> 8));
|
||
cnt = 0;
|
||
|
||
while (!(ssp0_reg_read(SSP_STATUS) & (0x1 << 6))) {
|
||
if (cnt ++ > 1000000) {
|
||
LCDLOGE("ERROR: spi write byte error_ssp0_reg!\r\n");
|
||
return;
|
||
}
|
||
}
|
||
ssp0_reg_write(SSP_DATAR, (0x1 << 8) | (*(data + i) & 0xff));
|
||
} else
|
||
LCDLOGE("spi write byte not support length_ssp0_reg!\r\n");
|
||
}
|
||
else if (line_num == 4)
|
||
{
|
||
ssp0_reg_write(SSP_DATAR, *(data + i));
|
||
}
|
||
else
|
||
{
|
||
LCDLOGE("ERROR: spi line number error_ssp0_reg!\r\n");
|
||
return;
|
||
}
|
||
}
|
||
|
||
#elif defined _QUEC_LCD_SSP2_ //默认选用SSP2通道
|
||
ssp2_reg_write(0x54, 0x5);
|
||
reg = ssp2_reg_read(0) & ~(0x1f << 5);
|
||
|
||
if (line_num == 3) {
|
||
ssp2_reg_write(0, reg | (8 << 5));
|
||
} else if (line_num == 4) {
|
||
ssp2_reg_write(0, reg | ((data_bits -1) << 5));
|
||
}
|
||
|
||
for (i = 0; i < sum_pixel; i++) {
|
||
cnt = 0;
|
||
/* wait for TX not full */
|
||
while (!(ssp2_reg_read(SSP_STATUS) & (0x1 << 6))) {
|
||
if (cnt ++ > 1000000) {
|
||
LCDLOGE("ERROR: spi write byte error!\r\n");
|
||
return;
|
||
}
|
||
}
|
||
if (line_num == 3) {
|
||
if ((data_bits == 16) || (data_bits == 8)) {
|
||
ssp2_reg_write(SSP_DATAR, (1 << 8) | (*(data + i) >> 8));
|
||
cnt = 0;
|
||
|
||
while (!(ssp2_reg_read(SSP_STATUS) & (0x1 << 6))) {
|
||
if (cnt ++ > 1000000) {
|
||
LCDLOGE("ERROR: spi write byte error!\r\n");
|
||
return;
|
||
}
|
||
}
|
||
ssp2_reg_write(SSP_DATAR, (0x1 << 8) | (*(data + i) & 0xff));
|
||
} else
|
||
LCDLOGE("spi write byte not support length!\r\n");
|
||
} else if (line_num == 4) {
|
||
ssp2_reg_write(SSP_DATAR, *(data + i));
|
||
} else {
|
||
LCDLOGE("ERROR: spi line number error!\r\n");
|
||
return;
|
||
}
|
||
}
|
||
|
||
#endif
|
||
|
||
}
|
||
|
||
void ssp_read_data_from_LCD(uint32_t *data, uint32_t data_bits)
|
||
{
|
||
int reg = 0;
|
||
int status = 0;
|
||
#ifdef _QUEC_LCD_SSP0_ //打开宏则选用SSP0通道
|
||
|
||
reg = ssp0_reg_read(0) & ~(0x1f << 5);
|
||
if ((data_bits < 1) || (data_bits > 31)) {
|
||
LCDLOGE("[Error]: not supported spi data bits_ssp0_reg\r\n");
|
||
return;
|
||
}
|
||
|
||
if (data_bits > 8)
|
||
ssp0_reg_write(0, reg | (data_bits << 5));
|
||
else
|
||
ssp0_reg_write(0, reg | ((data_bits -1) << 5)); //8 bit
|
||
|
||
ssp0_reg_write(0x54, 0x7);
|
||
ssp0_reg_write(SSP_DATAR, 0x0);
|
||
|
||
while (((status = ssp0_reg_read(SSP_STATUS)) & (0x1 << 14)) == 0);
|
||
|
||
*data = ssp0_reg_read(SSP_DATAR);
|
||
|
||
#elif defined _QUEC_LCD_SSP2_ //默认选用SSP2通道
|
||
|
||
reg = ssp2_reg_read(0) & ~(0x1f << 5);
|
||
if ((data_bits < 1) || (data_bits > 31)) {
|
||
LCDLOGE("[Error]: not supported spi data bits\r\n");
|
||
return;
|
||
}
|
||
|
||
if (data_bits > 8)
|
||
ssp2_reg_write(0, reg | (data_bits << 5));
|
||
else
|
||
ssp2_reg_write(0, reg | ((data_bits -1) << 5)); //8 bit
|
||
|
||
ssp2_reg_write(0x54, 0x7);
|
||
ssp2_reg_write(SSP_DATAR, 0x0);
|
||
|
||
while (((status = ssp2_reg_read(SSP_STATUS)) & (0x1 << 14)) == 0);
|
||
|
||
*data = ssp2_reg_read(SSP_DATAR);
|
||
|
||
#endif
|
||
|
||
}
|
||
|
||
void wait_ssp_write_data_to_LCD_complete(void)
|
||
{
|
||
int cnt = 0;
|
||
|
||
#ifdef _QUEC_LCD_SSP0_ //打开宏则选用SSP0通道
|
||
|
||
/* wait for TX empty */
|
||
while ((ssp0_reg_read(SSP_STATUS) & 0xfc0) != 0x40) {
|
||
if (cnt++ > 1000000) {
|
||
uudelay(1);//20231026Improve the timeout detection time
|
||
LCDLOGE("ERROR: spi write byte error_ssp0_reg!\r\n");
|
||
return;
|
||
}
|
||
}
|
||
|
||
#elif defined _QUEC_LCD_SSP2_ //默认选用SSP2通道
|
||
|
||
/* wait for TX empty */
|
||
while ((ssp2_reg_read(SSP_STATUS) & 0xfc0) != 0x40) {
|
||
if (cnt++ > 1000000) {
|
||
uudelay(1);//20231026Improve the timeout detection time
|
||
LCDLOGE("ERROR: spi write byte error!\r\n");
|
||
return;
|
||
}
|
||
}
|
||
|
||
#endif
|
||
}
|
||
|
||
|