147 lines
8.7 KiB
C
147 lines
8.7 KiB
C
/*------------------------------------------------------------
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(C) Copyright [2006-2008] Marvell International Ltd.
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All Rights Reserved
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------------------------------------------------------------*/
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/*******************************************************************************
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* M O D U L E B O D Y
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*******************************************************************************
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* COPYRIGHT (C) 2003, 2004 Intel Corporation.
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*
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* This software as well as the software described in it is furnished under
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* license and may only be used or copied in accordance with the terms of the
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* license. The information in this file is furnished for informational use
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* only, is subject to change without notice, and should not be construed as
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* a commitment by Intel Corporation. Intel Corporation assumes no
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* responsibility or liability for any errors or inaccuracies that may appear
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* in this document or any software that may be provided in association with
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* this document.
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* Except as permitted by such license, no part of this document may be
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* reproduced, stored in a retrieval system, or transmitted in any form or by
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* any means without the express written consent of Intel Corporation.
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*
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*******************************************************************************
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*
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* Title: UDC DRIVER - USB Device Controller header file
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*
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* Filename: udc_def.h
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*
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* Author: Yossi Gabay
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*
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* Description: This file contains general definitions for UDC driver
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*
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* Notes:
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******************************************************************************/
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#if !defined(_UDC_DEF_H_)
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#define _UDC_DEF_H_
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//#include "global_types.h"
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#define UDC_FIFO_32BITS_ALIGNMENT ( 0x03U )
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#define UDC_ENDPOINT_GROUP_LIMIT ( UDC_ENDPOINT_Q )
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#define UDC_IS_ENDPOINT_GROUP_0(eNDPOINT) ((eNDPOINT) < UDC_ENDPOINT_GROUP_LIMIT)
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#define UDC_IS_ENDPOINT_GROUP_1(eNDPOINT) ( !UDC_IS_ENDPOINT_GROUP_0(eNDPOINT) )
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#define UDC_GET_PACKET_COMPLETE_INTERRUPT_MASK(eNDPOINT) \
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((UDC_IS_ENDPOINT_GROUP_0(eNDPOINT)) ? \
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(0x01U << ((eNDPOINT)<<1)) : \
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(0x01U << (((eNDPOINT)<<1) - UDC_ENDPOINT_GROUP_LIMIT)))
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#define UDC_IS_ENDPOINT_0(eNDPOINT) ( (eNDPOINT) == UDC_ENDPOINT_0 )
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#define UDC_IS_ENDPOINT_GENERAL(eNDPOINT) ( !IS_ENDPOINT_CONTROL(eNDPOINT) )
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#define UDC_EP0_SETUP_CMD_MASK (UDC_UDCCSR0_OPC | UDC_UDCCSR0_SA)
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#define UDC_EP0_IS_RX_FIFO_HAS_DATA() (((_pUdcRegisters->UDCCSR[UDC_ENDPOINT_0]) & UDC_UDCCSR0_RNE) != 0)
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#define UDC_EP0_IS_SETUP_CMD(uDDCSR0vALUE) (((uDDCSR0vALUE) & (UDC_EP0_SETUP_CMD_MASK)) == (UDC_EP0_SETUP_CMD_MASK))
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//#define UDC_EP0_IS_OUT_PACKET(uDDCSR0vALUE) (((uDDCSR0vALUE) & (UDC_EP0_SETUP_CMD_MASK)) == (UDC_UDCCSR0_OPC))
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//#define UDC_EP0_IS_IN_PACKET(uDDCSR0vALUE) (((uDDCSR0vALUE) & (UDC_EP0_SETUP_CMD_MASK)) == 0)
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//#define UDC_EP0_IS_OUT_PACKET(uDDCSR0vALUE) (((uDDCSR0vALUE) & (UDC_UDCCSR0_OPC)) == (UDC_UDCCSR0_OPC))
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//#define UDC_EP0_IS_IN_PACKET(uDDCSR0vALUE) (((uDDCSR0vALUE) & (UDC_UDCCSR0_OPC)) == 0)
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#define UDC_EP0_IS_OUT_PACKET(uDDCSR0vALUE) (((UINT32)((UINT32)(uDDCSR0vALUE) & (UDC_UDCCSR0_OPC))) == (UDC_UDCCSR0_OPC))
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#define UDC_EP0_IS_IN_PACKET(uDDCSR0vALUE) (((UINT32)((UINT32)(uDDCSR0vALUE) & (UDC_UDCCSR0_OPC))) == 0)
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//#define UDC_EP0_SET_SHORT_PACKET() (_pUdcRegisters->UDCCSR[UDC_ENDPOINT_0] = UDC_UDCCSR0_IPR)
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//#define UDC_EP0_SET_IPR(uDDCSR0vALUE) (_pUdcRegisters->UDCCSR[UDC_ENDPOINT_0] = (uDDCSR0vALUE) | UDC_UDCCSR0_IPR)
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#define UDC_EP0_SET_IPR() (_pUdcRegisters->UDCCSR[UDC_ENDPOINT_0] = UDC_UDCCSR0_IPR)
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#define UDC_EP0_SET_UDCCSR0(uDDCSR0vALUE) (_pUdcRegisters->UDCCSR[UDC_ENDPOINT_0] = (uDDCSR0vALUE))
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#define UDC_EP0_GET_FIFO_ADDRESS() (UDC_GET_FIFO_ADDRESS(UDC_ENDPOINT_0))
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#define UDC_EP0_GET_UDCCSR() (UDC_GET_UDCCSRAX(UDC_ENDPOINT_0))
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#define UDC_EP0_CLEAR_OPC() (_pUdcRegisters->UDCCSR[UDC_ENDPOINT_0] = UDC_UDCCSR0_OPC)
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//#define UDC_EP0_CLEAR_OPC(uDDCSR0vALUE) (_pUdcRegisters->UDCCSR[UDC_ENDPOINT_0] = (uDDCSR0vALUE) | UDC_UDCCSR0_OPC)
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#define UDC_EP0_CLEAR_SETUP_CMD() (_pUdcRegisters->UDCCSR[UDC_ENDPOINT_0] = UDC_UDCCSR0_SA | UDC_UDCCSR0_OPC)
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#define UDC_IS_PACKET_COMPLETE(uDDCSRvALUE) (((uDDCSRvALUE) & UDC_UDCCSR_PC) != 0) //bit is set
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#define UDC_IS_BUFFER_NOT_EMPTY(uDDCSRvALUE) (((uDDCSRvALUE) & UDC_UDCCSR_BNE_BNF) != 0)
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#define UDC_IS_BUFFER_NOT_FULL(uDDCSRvALUE) (((uDDCSRvALUE) & UDC_UDCCSR_BNE_BNF) != 0)
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#define UDC_IS_SHORT_PACKET(uDDCSRvALUE) (((uDDCSRvALUE) & UDC_UDCCSR_SP) != 0)
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#define UDC_IS_ROOM_IN_FIFO(uDDCSRvALUE) (((uDDCSRvALUE) & UDC_UDCCSR_FS) != 0)
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#define UDC_IS_SST_SET(uDDCSRvALUE) (((uDDCSRvALUE) & UDC_UDCCSR_SST) != 0)
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#define UDC_GET_FRAME_NUMBER() ((_pUdcRegisters->UDCFNR) & UDC_UDCFNR_MASK)
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#define UDC_GET_FIFO_BYTE_COUNT(eNDPOINT) (_pUdcRegisters->UDCBCR[eNDPOINT])
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#define UDC_GET_UDCCSRAX(eNDPOINT) (_pUdcRegisters->UDCCSR[eNDPOINT])
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#define UDC_GET_UDCCSR_ADDRESS(eNDPOINT) (&(UDC_GET_UDCCSRAX(eNDPOINT)))
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#define UDC_GET_FIFO_ADDRESS(eNDPOINT) ((volatile UINT32 *)(&(_pUdcRegisters->UDCDR[eNDPOINT])))
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//#define UDC_GET_FIFO_ADDRESS(eNDPOINT) ((volatile UINT32 *)0x1000)
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#define UDC_GET_MAX_PACKET_SIZE(eNDPOINT) (_u1dcDefaultEndpointConfig[eNDPOINT].usbMaxPacketSize)
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#define UDC_GET_ENDPOINT_TYPE(eNDPOINT) (_u1dcDefaultEndpointConfig[eNDPOINT].usbEndpointType)
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#define UDC_SET_SHORT_PACKET(eNDPOINT) (TURN_BIT_ON(_pUdcRegisters->UDCCSR[eNDPOINT], UDC_UDCCSR_SP))
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#define UDC_SET_STALL_ENDPOINT(eNDPOINT) (TURN_BIT_ON(_pUdcRegisters->UDCCSR[eNDPOINT], UDC_UDCCSR_FST))
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#define UDC_CLEAR_PC(eNDPOINT) (TURN_BIT_ON(_pUdcRegisters->UDCCSR[eNDPOINT], UDC_UDCCSR_PC))
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#define UDC_CLEAR_STALL(eNDPOINT) (TURN_BIT_ON(_pUdcRegisters->UDCCSR[eNDPOINT], UDC_UDCCSR_SST))
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#define UDC_CLEAR_EFE(eNDPOINT) (TURN_BIT_ON(_pUdcRegisters->UDCCSR[eNDPOINT], UDC_UDCCSR_EFE))
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#define UDC_CLEAR_PC_EFE(eNDPOINT) (TURN_BIT_ON(_pUdcRegisters->UDCCSR[eNDPOINT], (UDC_UDCCSR_PC |UDC_UDCCSR_EFE)))
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#define UDC_ACTIVATE_HARDWARE(E) (TURN_BIT_ON(_pUdcRegisters->UDCCR, UDC_UDCCR_UDE) )
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#define UDC_DEACTIVATE_HARDWARE() (TURN_BIT_OFF(_pUdcRegisters->UDCCR, UDC_UDCCR_UDE) )
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#define UDC_IS_UDC_ACTIVATED() ((IS_BIT_ON(_pUdcRegisters->UDCCR, UDC_UDCCR_UDE)))
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#define UDC_CLEAR_EVENT(eVENT) ( TURN_BIT_ON(_pUdcRegisters->UDCISR1, (eVENT)) )
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#define UDC_CLEAR_PACKET_COMPLETE_0(eNDPOINT) ( TURN_BIT_ON(_pUdcRegisters->UDCISR0, ((eNDPOINT) << 1)) )
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#define UDC_CLEAR_PACKET_COMPLETE_1(eNDPOINT) ( TURN_BIT_ON(_pUdcRegisters->UDCISR1, ((eNDPOINT) << 1)) )
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//#define UDC_CLEAR_INTER_ST_0(eNDPOINT,eVENT) ( TURN_BIT_ON(_pUdcRegisters->UDCISR0, (eVENT)) )
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//#define UDC_CLEAR_INTER_ST_1(eNDPOINT,eVENT) ( TURN_BIT_ON(_pUdcRegisters->UDCISR1, (eVENT)) )
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#define UDC_CONVERT_EVENT_TO_BIT(eVENTeNUM) ( \
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(((eVENTeNUM) == UDC_EVENT_RESET) ? UDC_UDCICR1_IERS : \
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(((eVENTeNUM) == UDC_EVENT_SUSPEND) ? UDC_UDCICR1_IESU : \
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(((eVENTeNUM) == UDC_EVENT_RESUME) ? UDC_UDCICR1_IERU : \
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(((eVENTeNUM) == UDC_EVENT_SOF) ? UDC_UDCICR1_IESOF : \
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(((eVENTeNUM) == UDC_EVENT_CONFIG_CHANGE) ? UDC_UDCICR1_IECC : \
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0 ))))))
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//YG - Maybe needs TURN_BIT_ON_MASK(reg,bit,mask) - for RESERVED BITS
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#define TEST_BIT_ON(vALUE,bITmASK) ( (vALUE) & (bITmASK) )
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#define IS_BIT_ON(vALUE,bITmASK) ( ((vALUE) & (bITmASK)) ? TRUE : FALSE )
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//YG - move to usb_device ???
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//Anton: please, never define a macro with function call (expression) inside (): this won't compile in case PMUPeripheralBothClocks is an empty macro
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#if defined(PERIPHERAL_CLOCKS_VIA_PMU_API)
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#define UDC_CLOCK_CONTROL(pMU_eNABLE) (PMUPeripheralBothClocks(BOTH_USB, pMU_eNABLE))
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#else
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#define UDC_CLOCK_CONTROL(pMU_eNABLE)
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#endif
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#define UDC_IS_ENDPOINT_OUT(e) (_u1dcDefaultEndpointConfig[e].usbEndpointDir == UDC_EP_DIR_OUT)
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#endif /*_UDC_DEF_H_*/
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