64 lines
2.7 KiB
C
64 lines
2.7 KiB
C
/*------------------------------------------------------------
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(C) Copyright [2006-2008] Marvell International Ltd.
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All Rights Reserved
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------------------------------------------------------------*/
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/*--------------------------------------------------------------------------------------------------------------------
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INTEL CONFIDENTIAL
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Copyright 2006 Intel Corporation All Rights Reserved.
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The source code contained or described herein and all documents related to the source code ("Material") are owned
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by Intel Corporation or its suppliers or licensors. Title to the Material remains with Intel Corporation or
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its suppliers and licensors. The Material contains trade secrets and proprietary and confidential information of
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Intel or its suppliers and licensors. The Material is protected by worldwide copyright and trade secret laws and
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treaty provisions. No part of the Material may be used, copied, reproduced, modified, published, uploaded, posted,
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transmitted, distributed, or disclosed in any way without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual property right is granted to or
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conferred upon you by disclosure or delivery of the Materials, either expressly, by implication, inducement,
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estoppel or otherwise. Any license under such intellectual property rights must be express and approved by
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Intel in writing.
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-------------------------------------------------------------------------------------------------------------------*/
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#if !defined(_MIPSRAM_DEF_H_)
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#define _MIPSRAM_DEF_H_
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#define MIPS_TEST_EVENT_LIST_BUFSIZE (4*1024)
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#if defined(MIPS_TEST)
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#include "cpu_mips_test.h"
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#if defined(MIPS_TEST_RAM)
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//#if defined (_TAVOR_HARBELL_) || defined (_TAVOR_BOERNE_) || defined(SILICON_PV2)
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#if defined (_TAVOR_BOERNE_) || defined(SILICON_PV2)
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//Use extended buffer for debugging
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#define MIPS_RAM_BUFFER_SIZE (0x1000*4)
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#else
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#define MIPS_RAM_BUFFER_SIZE 0x1000
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#endif
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//#if defined (_TAVOR_HARBELL_) || defined(SILICON_PV2)
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#if defined(SILICON_PV2)
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// Don't use the MIPS_RAM_BUFFER_INTERNAL define but use explicit SCATTER
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extern __align(32) UINT32 mipsRamBuffer[MIPS_RAM_BUFFER_SIZE/sizeof(UINT32)];
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#else
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#if MIPS_RAM_BUFFER_SIZE<0x10000 /*For reasonable buffer sizes allow internal RAM use if desired*/
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#define MIPS_RAM_BUFFER_INTERNAL
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#endif
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#endif//_TAVOR_HARBELL_
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#endif//MIPS_TEST_RAM
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#endif//MIPS_TEST
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extern __align(32) UINT8 mipsEventList[MIPS_TEST_EVENT_LIST_BUFSIZE];
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extern UINT32 mipsEventListSize;
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extern void mipsRamStop(void);
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extern void mipsRamStart(void);
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extern void mipsRamStart(void);
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extern void mipsRamSaveToFile(void);
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extern void mipsRamSaveEventToRam(void);
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#endif//_MIPSRAM_DEF_H_
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