fix(lcd): tune asset playback durations

components/domain/src/runtime/domain_runtime_adapters.c

@@ -117,9 +117,11 @@ static const char *const s_wealth_direction_asset_dirs[] = {
     "southeast", /* 7 东南/SE */
 };
 
-#define DOMAIN_WEALTH_DIRECTION_FRAME_MS 100U
+#define DOMAIN_WEALTH_SPIN_FRAME_MS 50U
+#define DOMAIN_WEALTH_SPIN_REPEAT_COUNT 1U
+#define DOMAIN_WEALTH_DIRECTION_FRAME_MS 1200U
 #define DOMAIN_CHOUQIAN_FRAME_MS 500U
-#define DOMAIN_CHOUQIAN_FINAL_FRAME_MS 1000U
+#define DOMAIN_CHOUQIAN_FINAL_FRAME_MS 1500U
 #define DOMAIN_WUXING_QIANZHI_FRAME_MS 100U
 #define DOMAIN_WUXING_REVEAL_FRAME_MS 100U
 #define DOMAIN_WUXING_HOLD_FRAME_MS 500U
@@ -206,8 +208,8 @@ static const domain_expression_catalog_entry_t s_expression_catalog[] = {
             .interrupt_current = true,
             .return_to_idle = false,
             .asset_dir = "spin",
-            .repeat_count = 2, /* fixed two-cycle intro; completes before the cat rotates */
-            .frame_ms = DOMAIN_WEALTH_DIRECTION_FRAME_MS,
+            .repeat_count = DOMAIN_WEALTH_SPIN_REPEAT_COUNT,
+            .frame_ms = DOMAIN_WEALTH_SPIN_FRAME_MS,
         },
     },
     {
@@ -220,9 +222,9 @@ static const domain_expression_catalog_entry_t s_expression_catalog[] = {
             .asset_dir = "muyu",
             .frame_order = s_muyu_frame_order,
             .frame_order_count = sizeof(s_muyu_frame_order) / sizeof(s_muyu_frame_order[0]),
-            .repeat_count = 25,
+            .repeat_count = 1,
             .frame_ms = 50,
-            .duration_ms = 10000,
+            .duration_ms = 0,
         },
     },
 };

components/platform/src/lcd_direct.c

@@ -49,8 +49,8 @@
 #define LCD_DIRECT_FRAME_CACHE_MAX 4U
 #define LCD_DIRECT_PATH_MAX 96U
 #define LCD_DIRECT_LAST_FRAME_EXTRA_HOLD_MS 200U
-#define LCD_DIRECT_BASIC_FACE_FRAME_HOLD_MS 300U
-#define LCD_DIRECT_BASIC_FACE_LAST_FRAME_HOLD_MS 300U
+#define LCD_DIRECT_BASIC_FACE_FRAME_HOLD_MS 100U
+#define LCD_DIRECT_BASIC_FACE_LAST_FRAME_HOLD_MS 100U
 
 #define LCD_CMD_MADCTL  0x36
 #define LCD_CMD_RAMCTRL 0xB0